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// Auf QuarkCoin spezialisierte Version von Groestl inkl. Bitslice
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#include <stdio.h>
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#include <memory.h>
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#include <sys/types.h> // off_t
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#include <cuda_helper.h>
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#ifdef __INTELLISENSE__
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#define __CUDA_ARCH__ 500
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#endif
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#define TPB 256
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#define THF 4U
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#if __CUDA_ARCH__ >= 300
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#include "groestl_functions_quad.h"
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#include "groestl_transf_quad.h"
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#endif
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#define WANT_GROESTL80
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#ifdef WANT_GROESTL80
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__constant__ static uint32_t c_Message80[20];
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#endif
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#include "cuda_quark_groestl512_sm2.cuh"
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__global__ __launch_bounds__(TPB, THF)
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void quark_groestl512_gpu_hash_64_quad(const uint32_t threads, const uint32_t startNounce, uint32_t * g_hash, uint32_t * __restrict g_nonceVector)
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{
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#if __CUDA_ARCH__ >= 300
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// BEWARE : 4-WAY CODE (one hash need 4 threads)
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x) >> 2;
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if (thread < threads)
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{
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uint32_t message[8];
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uint32_t state[8];
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uint32_t nounce = g_nonceVector ? g_nonceVector[thread] : (startNounce + thread);
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off_t hashPosition = nounce - startNounce;
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uint32_t *pHash = &g_hash[hashPosition << 4];
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const uint32_t thr = threadIdx.x & 0x3; // % THF
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/*| M0 M1 M2 M3 | M4 M5 M6 M7 | (input)
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--|-------------|-------------|
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T0| 0 4 8 12 | 80 |
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T1| 1 5 13 | |
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T2| 2 6 14 | |
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T3| 3 7 15 | 01 |
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--|-------------|-------------| */
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#pragma unroll
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for(int k=0;k<4;k++) message[k] = pHash[thr + (k * THF)];
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#pragma unroll
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for(int k=4;k<8;k++) message[k] = 0;
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if (thr == 0) message[4] = 0x80U; // end of data tag
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if (thr == 3) message[7] = 0x01000000U;
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uint32_t msgBitsliced[8];
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to_bitslice_quad(message, msgBitsliced);
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groestl512_progressMessage_quad(state, msgBitsliced);
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uint32_t hash[16];
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from_bitslice_quad(state, hash);
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// uint4 = 4x4 uint32_t = 16 bytes
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if (thr == 0) {
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uint4 *phash = (uint4*) hash;
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uint4 *outpt = (uint4*) pHash;
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outpt[0] = phash[0];
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outpt[1] = phash[1];
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outpt[2] = phash[2];
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outpt[3] = phash[3];
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}
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}
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#endif
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}
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__host__
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void quark_groestl512_cpu_init(int thr_id, uint32_t threads)
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{
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int dev_id = device_map[thr_id];
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cuda_get_arch(thr_id);
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if (device_sm[dev_id] < 300 || cuda_arch[dev_id] < 300)
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quark_groestl512_sm20_init(thr_id, threads);
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}
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__host__
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void quark_groestl512_cpu_free(int thr_id)
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{
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int dev_id = device_map[thr_id];
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if (device_sm[dev_id] < 300 || cuda_arch[dev_id] < 300)
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quark_groestl512_sm20_free(thr_id);
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}
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__host__
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void quark_groestl512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order)
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{
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uint32_t threadsperblock = TPB;
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// Compute 3.0 benutzt die registeroptimierte Quad Variante mit Warp Shuffle
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// mit den Quad Funktionen brauchen wir jetzt 4 threads pro Hash, daher Faktor 4 bei der Blockzahl
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const uint32_t factor = THF;
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dim3 grid(factor*((threads + threadsperblock-1)/threadsperblock));
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dim3 block(threadsperblock);
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int dev_id = device_map[thr_id];
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if (device_sm[dev_id] >= 300 && cuda_arch[dev_id] >= 300)
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quark_groestl512_gpu_hash_64_quad<<<grid, block>>>(threads, startNounce, d_hash, d_nonceVector);
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else
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quark_groestl512_sm20_hash_64(thr_id, threads, startNounce, d_nonceVector, d_hash, order);
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}
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// --------------------------------------------------------------------------------------------------------------------------------------------
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#ifdef WANT_GROESTL80
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__host__
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void groestl512_setBlock_80(int thr_id, uint32_t *endiandata)
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{
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cudaMemcpyToSymbol(c_Message80, endiandata, sizeof(c_Message80), 0, cudaMemcpyHostToDevice);
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}
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__global__ __launch_bounds__(TPB, THF)
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void groestl512_gpu_hash_80_quad(const uint32_t threads, const uint32_t startNounce, uint32_t * g_outhash)
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{
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#if __CUDA_ARCH__ >= 300
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// BEWARE : 4-WAY CODE (one hash need 4 threads)
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x) >> 2;
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if (thread < threads)
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{
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const uint32_t thr = threadIdx.x & 0x3; // % THF
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/*| M0 M1 M2 M3 M4 | M5 M6 M7 | (input)
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--|----------------|----------|
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T0| 0 4 8 12 16 | 80 |
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T1| 1 5 17 | |
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T2| 2 6 18 | |
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T3| 3 7 Nc | 01 |
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--|----------------|----------| TPR */
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uint32_t message[8];
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#pragma unroll 5
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for(int k=0; k<5; k++) message[k] = c_Message80[thr + (k * THF)];
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#pragma unroll 3
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for(int k=5; k<8; k++) message[k] = 0;
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if (thr == 0) message[5] = 0x80U;
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if (thr == 3) {
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message[4] = cuda_swab32(startNounce + thread);
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message[7] = 0x01000000U;
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}
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uint32_t msgBitsliced[8];
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to_bitslice_quad(message, msgBitsliced);
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uint32_t state[8];
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groestl512_progressMessage_quad(state, msgBitsliced);
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uint32_t hash[16];
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from_bitslice_quad(state, hash);
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if (thr == 0) { /* 4 threads were done */
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const off_t hashPosition = thread;
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//if (!thread) hash[15] = 0xFFFFFFFF;
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uint4 *outpt = (uint4*) &g_outhash[hashPosition << 4];
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uint4 *phash = (uint4*) hash;
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outpt[0] = phash[0];
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outpt[1] = phash[1];
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outpt[2] = phash[2];
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outpt[3] = phash[3];
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}
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}
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#endif
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}
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__host__
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void groestl512_cuda_hash_80(const int thr_id, const uint32_t threads, const uint32_t startNounce, uint32_t *d_hash)
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{
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int dev_id = device_map[thr_id];
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if (device_sm[dev_id] >= 300 && cuda_arch[dev_id] >= 300) {
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const uint32_t threadsperblock = TPB;
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const uint32_t factor = THF;
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dim3 grid(factor*((threads + threadsperblock-1)/threadsperblock));
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dim3 block(threadsperblock);
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groestl512_gpu_hash_80_quad <<<grid, block>>> (threads, startNounce, d_hash);
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} else {
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const uint32_t threadsperblock = 256;
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dim3 grid((threads + threadsperblock-1)/threadsperblock);
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dim3 block(threadsperblock);
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groestl512_gpu_hash_80_sm2 <<<grid, block>>> (threads, startNounce, d_hash);
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}
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}
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#endif
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