mirror of https://github.com/GOSTSec/ccminer
Tanguy Pruvot
7 years ago
6 changed files with 455 additions and 410 deletions
@ -0,0 +1,267 @@
@@ -0,0 +1,267 @@
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// SM 2.x variant (tpruvot) |
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#ifdef __INTELLISENSE__ |
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//#define __CUDA_ARCH__ 210 |
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#define __CUDACC__ |
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#include <cuda_helper.h> |
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#include <cuda_texture_types.h> |
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#define __byte_perm(a,b,c) (a) |
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#define tex1Dfetch(t, n) (n) |
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#endif |
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#define USE_SHARED 1 |
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static unsigned int *d_textures[MAX_GPUS][8]; |
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#define PC32up(j, r) ((uint32_t)((j) + (r))) |
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#define PC32dn(j, r) 0 |
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#define QC32up(j, r) 0xFFFFFFFF |
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#define QC32dn(j, r) (((uint32_t)(r) << 24) ^ SPH_T32(~((uint32_t)(j) << 24))) |
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#define B32_0(x) __byte_perm(x, 0, 0x4440) |
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//((x) & 0xFF) |
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#define B32_1(x) __byte_perm(x, 0, 0x4441) |
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//(((x) >> 8) & 0xFF) |
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#define B32_2(x) __byte_perm(x, 0, 0x4442) |
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//(((x) >> 16) & 0xFF) |
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#define B32_3(x) __byte_perm(x, 0, 0x4443) |
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//((x) >> 24) |
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#define T0up(x) (*((uint32_t*)mixtabs + ( (x)))) |
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#define T0dn(x) (*((uint32_t*)mixtabs + ( 256+(x)))) |
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#define T1up(x) (*((uint32_t*)mixtabs + ( 512+(x)))) |
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#define T1dn(x) (*((uint32_t*)mixtabs + ( 768+(x)))) |
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#define T2up(x) (*((uint32_t*)mixtabs + (1024+(x)))) |
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#define T2dn(x) (*((uint32_t*)mixtabs + (1280+(x)))) |
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#define T3up(x) (*((uint32_t*)mixtabs + (1536+(x)))) |
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#define T3dn(x) (*((uint32_t*)mixtabs + (1792+(x)))) |
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texture<unsigned int, 1, cudaReadModeElementType> t0up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t0dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t1up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t1dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t2up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t2dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t3up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t3dn1; |
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extern uint32_t T0up_cpu[]; |
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extern uint32_t T0dn_cpu[]; |
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extern uint32_t T1up_cpu[]; |
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extern uint32_t T1dn_cpu[]; |
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extern uint32_t T2up_cpu[]; |
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extern uint32_t T2dn_cpu[]; |
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extern uint32_t T3up_cpu[]; |
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extern uint32_t T3dn_cpu[]; |
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#if __CUDA_ARCH__ < 300 || defined(_DEBUG) |
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#if (!USE_SHARED) |
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#include "groestl_simple.cuh" |
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#endif |
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__device__ __forceinline__ |
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void quark_groestl512_perm_P(uint32_t *a, char *mixtabs) |
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{ |
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#pragma unroll 1 |
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for(int r=0; r<14; r++) |
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{ |
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uint32_t t[32]; |
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#pragma unroll 16 |
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for (int k=0; k<16; k++) |
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a[(k*2)+0] ^= PC32up(k<< 4, r); |
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#pragma unroll 16 |
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for(int k=0;k<32;k+=2) { |
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uint32_t t0_0 = B32_0(a[(k ) & 0x1f]), t9_0 = B32_0(a[(k + 9) & 0x1f]); |
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uint32_t t2_1 = B32_1(a[(k + 2) & 0x1f]), t11_1 = B32_1(a[(k + 11) & 0x1f]); |
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uint32_t t4_2 = B32_2(a[(k + 4) & 0x1f]), t13_2 = B32_2(a[(k + 13) & 0x1f]); |
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uint32_t t6_3 = B32_3(a[(k + 6) & 0x1f]), t23_3 = B32_3(a[(k + 23) & 0x1f]); |
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t[k + 0] = T0up( t0_0 ) ^ T1up( t2_1 ) ^ T2up( t4_2 ) ^ T3up( t6_3 ) ^ |
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T0dn( t9_0 ) ^ T1dn( t11_1 ) ^ T2dn( t13_2 ) ^ T3dn( t23_3 ); |
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t[k + 1] = T0dn( t0_0 ) ^ T1dn( t2_1 ) ^ T2dn( t4_2 ) ^ T3dn( t6_3 ) ^ |
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T0up( t9_0 ) ^ T1up( t11_1 ) ^ T2up( t13_2 ) ^ T3up( t23_3 ); |
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} |
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#pragma unroll 32 |
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for(int k=0; k<32; k++) |
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a[k] = t[k]; |
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} |
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} |
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__device__ __forceinline__ |
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void quark_groestl512_perm_Q(uint32_t *a, char *mixtabs) |
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{ |
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#pragma unroll 1 |
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for(int r=0; r<14; r++) |
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{ |
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uint32_t t[32]; |
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#pragma unroll 16 |
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for (int k=0; k<16; k++) { |
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a[(k*2)+0] ^= QC32up(k << 4, r); |
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a[(k*2)+1] ^= QC32dn(k << 4, r); |
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} |
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#pragma unroll 16 |
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for(int k=0;k<32;k+=2) |
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{ |
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uint32_t t2_0 = B32_0(a[(k + 2) & 0x1f]), t1_0 = B32_0(a[(k + 1) & 0x1f]); |
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uint32_t t6_1 = B32_1(a[(k + 6) & 0x1f]), t5_1 = B32_1(a[(k + 5) & 0x1f]); |
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uint32_t t10_2 = B32_2(a[(k + 10) & 0x1f]), t9_2 = B32_2(a[(k + 9) & 0x1f]); |
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uint32_t t22_3 = B32_3(a[(k + 22) & 0x1f]), t13_3 = B32_3(a[(k + 13) & 0x1f]); |
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t[k + 0] = T0up( t2_0 ) ^ T1up( t6_1 ) ^ T2up( t10_2 ) ^ T3up( t22_3 ) ^ |
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T0dn( t1_0 ) ^ T1dn( t5_1 ) ^ T2dn( t9_2 ) ^ T3dn( t13_3 ); |
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t[k + 1] = T0dn( t2_0 ) ^ T1dn( t6_1 ) ^ T2dn( t10_2 ) ^ T3dn( t22_3 ) ^ |
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T0up( t1_0 ) ^ T1up( t5_1 ) ^ T2up( t9_2 ) ^ T3up( t13_3 ); |
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} |
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#pragma unroll 32 |
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for(int k=0; k<32; k++) |
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a[k] = t[k]; |
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} |
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} |
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#endif |
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__global__ |
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void quark_groestl512_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint32_t *g_hash, uint32_t *g_nonceVector) |
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{ |
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#if __CUDA_ARCH__ < 300 || defined(_DEBUG) |
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#if USE_SHARED |
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__shared__ char mixtabs[8 * 1024]; |
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if (threadIdx.x < 256) { |
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*((uint32_t*)mixtabs + ( threadIdx.x)) = tex1Dfetch(t0up1, threadIdx.x); |
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*((uint32_t*)mixtabs + ( 256+threadIdx.x)) = tex1Dfetch(t0dn1, threadIdx.x); |
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*((uint32_t*)mixtabs + ( 512+threadIdx.x)) = tex1Dfetch(t1up1, threadIdx.x); |
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*((uint32_t*)mixtabs + ( 768+threadIdx.x)) = tex1Dfetch(t1dn1, threadIdx.x); |
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*((uint32_t*)mixtabs + (1024+threadIdx.x)) = tex1Dfetch(t2up1, threadIdx.x); |
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*((uint32_t*)mixtabs + (1280+threadIdx.x)) = tex1Dfetch(t2dn1, threadIdx.x); |
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*((uint32_t*)mixtabs + (1536+threadIdx.x)) = tex1Dfetch(t3up1, threadIdx.x); |
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*((uint32_t*)mixtabs + (1792+threadIdx.x)) = tex1Dfetch(t3dn1, threadIdx.x); |
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} |
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__syncthreads(); |
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#endif |
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uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x); |
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if (thread < threads) |
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{ |
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// GROESTL |
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uint32_t message[32]; |
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uint32_t state[32]; |
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uint32_t nounce = (g_nonceVector != NULL) ? g_nonceVector[thread] : (startNounce + thread); |
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off_t hashPosition = nounce - startNounce; |
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uint32_t *pHash = &g_hash[hashPosition * 16]; |
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#pragma unroll 4 |
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for (int i=0; i<16; i += 4) |
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AS_UINT4(&message[i]) = AS_UINT4(&pHash[i]); |
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message[16] = 0x80U; |
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#pragma unroll 14 |
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for(int i=17; i<31; i++) message[i] = 0; |
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message[31] = 0x01000000U; |
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#pragma unroll 32 |
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for(int i=0; i<32; i++) state[i] = message[i]; |
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state[31] ^= 0x20000U; |
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// Perm |
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#if USE_SHARED |
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quark_groestl512_perm_P(state, mixtabs); |
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state[31] ^= 0x20000U; |
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quark_groestl512_perm_Q(message, mixtabs); |
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#pragma unroll 32 |
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for(int i=0; i<32; i++) state[i] ^= message[i]; |
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#pragma unroll 16 |
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for(int i=16; i<32; i++) message[i] = state[i]; |
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quark_groestl512_perm_P(state, mixtabs); |
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#else |
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tex_groestl512_perm_P(state); |
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state[31] ^= 0x20000U; |
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tex_groestl512_perm_Q(message); |
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#pragma unroll 32 |
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for(int i=0; i<32; i++) state[i] ^= message[i]; |
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#pragma unroll 16 |
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for(int i=16; i<32; i++) message[i] = state[i]; |
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tex_groestl512_perm_P(state); |
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#endif |
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#pragma unroll 16 |
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for(int i=16; i<32; i++) state[i] ^= message[i]; |
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uint4 *outpt = (uint4*)(pHash); |
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uint4 *phash = (uint4*)(&state[16]); |
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outpt[0] = phash[0]; |
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outpt[1] = phash[1]; |
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outpt[2] = phash[2]; |
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outpt[3] = phash[3]; |
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} |
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#endif |
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} |
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#define texDef(id, texname, texmem, texsource, texsize) { \ |
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unsigned int *texmem; \ |
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cudaMalloc(&texmem, texsize); \ |
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d_textures[thr_id][id] = texmem; \ |
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cudaMemcpy(texmem, texsource, texsize, cudaMemcpyHostToDevice); \ |
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texname.normalized = 0; \ |
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texname.filterMode = cudaFilterModePoint; \ |
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texname.addressMode[0] = cudaAddressModeClamp; \ |
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{ cudaChannelFormatDesc channelDesc = cudaCreateChannelDesc<unsigned int>(); \ |
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cudaBindTexture(NULL, &texname, texmem, &channelDesc, texsize ); \ |
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} \ |
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} |
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__host__ |
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void quark_groestl512_sm20_init(int thr_id, uint32_t threads) |
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{ |
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texDef(0, t0up1, d_T0up, T0up_cpu, sizeof(uint32_t)*256); |
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texDef(1, t0dn1, d_T0dn, T0dn_cpu, sizeof(uint32_t)*256); |
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texDef(2, t1up1, d_T1up, T1up_cpu, sizeof(uint32_t)*256); |
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texDef(3, t1dn1, d_T1dn, T1dn_cpu, sizeof(uint32_t)*256); |
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texDef(4, t2up1, d_T2up, T2up_cpu, sizeof(uint32_t)*256); |
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texDef(5, t2dn1, d_T2dn, T2dn_cpu, sizeof(uint32_t)*256); |
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texDef(6, t3up1, d_T3up, T3up_cpu, sizeof(uint32_t)*256); |
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texDef(7, t3dn1, d_T3dn, T3dn_cpu, sizeof(uint32_t)*256); |
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} |
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__host__ |
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void quark_groestl512_sm20_free(int thr_id) |
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{ |
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if (!d_textures[thr_id][0]) return; |
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for (int i=0; i<8; i++) |
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cudaFree(d_textures[thr_id][i]); |
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d_textures[thr_id][0] = NULL; |
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} |
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__host__ |
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void quark_groestl512_sm20_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order) |
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{ |
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int threadsperblock = 512; |
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dim3 grid((threads + threadsperblock-1)/threadsperblock); |
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dim3 block(threadsperblock); |
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quark_groestl512_gpu_hash_64<<<grid, block>>>(threads, startNounce, d_hash, d_nonceVector); |
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} |
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__host__ |
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void quark_doublegroestl512_sm20_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order) |
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{ |
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int threadsperblock = 512; |
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dim3 grid((threads + threadsperblock-1)/threadsperblock); |
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dim3 block(threadsperblock); |
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quark_groestl512_gpu_hash_64<<<grid, block>>>(threads, startNounce, d_hash, d_nonceVector); |
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quark_groestl512_gpu_hash_64<<<grid, block>>>(threads, startNounce, d_hash, d_nonceVector); |
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} |
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@ -1,342 +0,0 @@
@@ -1,342 +0,0 @@
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// SM 2.1 variant |
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// #include "cuda_helper.h" |
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#define MAXWELL_OR_FERMI 0 |
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#define USE_SHARED 1 |
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static unsigned int *d_textures[MAX_GPUS][8]; |
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// #define SPH_C32(x) ((uint32_t)(x ## U)) |
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// #define SPH_T32(x) ((x) & SPH_C32(0xFFFFFFFF)) |
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#define PC32up(j, r) ((uint32_t)((j) + (r))) |
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#define PC32dn(j, r) 0 |
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#define QC32up(j, r) 0xFFFFFFFF |
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#define QC32dn(j, r) (((uint32_t)(r) << 24) ^ SPH_T32(~((uint32_t)(j) << 24))) |
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#define B32_0(x) __byte_perm(x, 0, 0x4440) |
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//((x) & 0xFF) |
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#define B32_1(x) __byte_perm(x, 0, 0x4441) |
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//(((x) >> 8) & 0xFF) |
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#define B32_2(x) __byte_perm(x, 0, 0x4442) |
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//(((x) >> 16) & 0xFF) |
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#define B32_3(x) __byte_perm(x, 0, 0x4443) |
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//((x) >> 24) |
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// a healthy mix between shared and textured access provides the highest speed on Compute 3.0 and 3.5! |
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#define T0up(x) (*((uint32_t*)mixtabs + ( (x)))) |
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#define T0dn(x) tex1Dfetch(t0dn1, x) |
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#define T1up(x) tex1Dfetch(t1up1, x) |
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#define T1dn(x) (*((uint32_t*)mixtabs + (768+(x)))) |
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#define T2up(x) tex1Dfetch(t2up1, x) |
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#define T2dn(x) (*((uint32_t*)mixtabs + (1280+(x)))) |
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#define T3up(x) (*((uint32_t*)mixtabs + (1536+(x)))) |
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#define T3dn(x) tex1Dfetch(t3dn1, x) |
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texture<unsigned int, 1, cudaReadModeElementType> t0up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t0dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t1up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t1dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t2up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t2dn1; |
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texture<unsigned int, 1, cudaReadModeElementType> t3up1; |
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texture<unsigned int, 1, cudaReadModeElementType> t3dn1; |
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extern uint32_t T0up_cpu[]; |
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extern uint32_t T0dn_cpu[]; |
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extern uint32_t T1up_cpu[]; |
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extern uint32_t T1dn_cpu[]; |
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extern uint32_t T2up_cpu[]; |
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extern uint32_t T2dn_cpu[]; |
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extern uint32_t T3up_cpu[]; |
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extern uint32_t T3dn_cpu[]; |
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#if __CUDA_ARCH__ < 300 || defined(_DEBUG) |
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__device__ __forceinline__ |
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void quark_groestl512_perm_P(uint32_t *a, char *mixtabs) |
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{ |
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uint32_t t[32]; |
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for(int r=0; r<14; r++) |
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{ |
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switch(r) { |
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case 0: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 0); break; |
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case 1: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 1); break; |
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case 2: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 2); break; |
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case 3: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 3); break; |
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case 4: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 4); break; |
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case 5: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 5); break; |
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case 6: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 6); break; |
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case 7: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 7); break; |
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case 8: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 8); break; |
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case 9: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 9); break; |
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case 10: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 10); break; |
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case 11: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 11); break; |
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case 12: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 12); break; |
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case 13: |
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#pragma unroll 16 |
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k<< 4, 13); break; |
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} |
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// RBTT |
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#pragma unroll 16 |
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for(int k=0;k<32;k+=2) { |
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uint32_t t0_0 = B32_0(a[(k ) & 0x1f]), t9_0 = B32_0(a[(k + 9) & 0x1f]); |
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uint32_t t2_1 = B32_1(a[(k + 2) & 0x1f]), t11_1 = B32_1(a[(k + 11) & 0x1f]); |
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uint32_t t4_2 = B32_2(a[(k + 4) & 0x1f]), t13_2 = B32_2(a[(k + 13) & 0x1f]); |
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uint32_t t6_3 = B32_3(a[(k + 6) & 0x1f]), t23_3 = B32_3(a[(k + 23) & 0x1f]); |
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t[k + 0] = T0up( t0_0 ) ^ T1up( t2_1 ) ^ T2up( t4_2 ) ^ T3up( t6_3 ) ^ |
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T0dn( t9_0 ) ^ T1dn( t11_1 ) ^ T2dn( t13_2 ) ^ T3dn( t23_3 ); |
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|
||||
t[k + 1] = T0dn( t0_0 ) ^ T1dn( t2_1 ) ^ T2dn( t4_2 ) ^ T3dn( t6_3 ) ^ |
||||
T0up( t9_0 ) ^ T1up( t11_1 ) ^ T2up( t13_2 ) ^ T3up( t23_3 ); |
||||
} |
||||
|
||||
#pragma unroll 32 |
||||
for(int k=0; k<32; k++) { |
||||
a[k] = t[k]; |
||||
} |
||||
} |
||||
} |
||||
|
||||
__device__ __forceinline__ |
||||
void quark_groestl512_perm_Q(uint32_t *a, char *mixtabs) |
||||
{ |
||||
for(int r=0; r<14; r++) |
||||
{ |
||||
uint32_t t[32]; |
||||
|
||||
switch(r) { |
||||
case 0: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 0); a[(k*2)+1] ^= QC32dn(k<< 4, 0);} break; |
||||
case 1: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 1); a[(k*2)+1] ^= QC32dn(k<< 4, 1);} break; |
||||
case 2: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 2); a[(k*2)+1] ^= QC32dn(k<< 4, 2);} break; |
||||
case 3: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 3); a[(k*2)+1] ^= QC32dn(k<< 4, 3);} break; |
||||
case 4: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 4); a[(k*2)+1] ^= QC32dn(k<< 4, 4);} break; |
||||
case 5: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 5); a[(k*2)+1] ^= QC32dn(k<< 4, 5);} break; |
||||
case 6: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 6); a[(k*2)+1] ^= QC32dn(k<< 4, 6);} break; |
||||
case 7: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 7); a[(k*2)+1] ^= QC32dn(k<< 4, 7);} break; |
||||
case 8: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 8); a[(k*2)+1] ^= QC32dn(k<< 4, 8);} break; |
||||
case 9: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 9); a[(k*2)+1] ^= QC32dn(k<< 4, 9);} break; |
||||
case 10: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 10); a[(k*2)+1] ^= QC32dn(k<< 4, 10);} break; |
||||
case 11: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 11); a[(k*2)+1] ^= QC32dn(k<< 4, 11);} break; |
||||
case 12: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 12); a[(k*2)+1] ^= QC32dn(k<< 4, 12);} break; |
||||
case 13: |
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k<< 4, 13); a[(k*2)+1] ^= QC32dn(k<< 4, 13);} break; |
||||
} |
||||
|
||||
// RBTT |
||||
#pragma unroll 16 |
||||
for(int k=0;k<32;k+=2) |
||||
{ |
||||
uint32_t t2_0 = B32_0(a[(k + 2) & 0x1f]), t1_0 = B32_0(a[(k + 1) & 0x1f]); |
||||
uint32_t t6_1 = B32_1(a[(k + 6) & 0x1f]), t5_1 = B32_1(a[(k + 5) & 0x1f]); |
||||
uint32_t t10_2 = B32_2(a[(k + 10) & 0x1f]), t9_2 = B32_2(a[(k + 9) & 0x1f]); |
||||
uint32_t t22_3 = B32_3(a[(k + 22) & 0x1f]), t13_3 = B32_3(a[(k + 13) & 0x1f]); |
||||
|
||||
t[k + 0] = T0up( t2_0 ) ^ T1up( t6_1 ) ^ T2up( t10_2 ) ^ T3up( t22_3 ) ^ |
||||
T0dn( t1_0 ) ^ T1dn( t5_1 ) ^ T2dn( t9_2 ) ^ T3dn( t13_3 ); |
||||
|
||||
t[k + 1] = T0dn( t2_0 ) ^ T1dn( t6_1 ) ^ T2dn( t10_2 ) ^ T3dn( t22_3 ) ^ |
||||
T0up( t1_0 ) ^ T1up( t5_1 ) ^ T2up( t9_2 ) ^ T3up( t13_3 ); |
||||
} |
||||
#pragma unroll 32 |
||||
for(int k=0;k<32;k++) |
||||
a[k] = t[k]; |
||||
} |
||||
} |
||||
|
||||
#endif |
||||
|
||||
__global__ |
||||
void quark_groestl512_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint32_t *g_hash, uint32_t *g_nonceVector) |
||||
{ |
||||
#if __CUDA_ARCH__ < 300 || defined(_DEBUG) |
||||
extern __shared__ char mixtabs[]; |
||||
|
||||
if (threadIdx.x < 256) |
||||
{ |
||||
*((uint32_t*)mixtabs + ( threadIdx.x)) = tex1Dfetch(t0up1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (256+threadIdx.x)) = tex1Dfetch(t0dn1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (512+threadIdx.x)) = tex1Dfetch(t1up1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (768+threadIdx.x)) = tex1Dfetch(t1dn1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (1024+threadIdx.x)) = tex1Dfetch(t2up1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (1280+threadIdx.x)) = tex1Dfetch(t2dn1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (1536+threadIdx.x)) = tex1Dfetch(t3up1, threadIdx.x); |
||||
*((uint32_t*)mixtabs + (1792+threadIdx.x)) = tex1Dfetch(t3dn1, threadIdx.x); |
||||
} |
||||
|
||||
__syncthreads(); |
||||
|
||||
uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x); |
||||
if (thread < threads) |
||||
{ |
||||
// GROESTL |
||||
uint32_t message[32]; |
||||
uint32_t state[32]; |
||||
|
||||
uint32_t nounce = (g_nonceVector != NULL) ? g_nonceVector[thread] : (startNounce + thread); |
||||
|
||||
off_t hashPosition = nounce - startNounce; |
||||
uint32_t *inpHash = &g_hash[hashPosition * 16]; |
||||
|
||||
#pragma unroll 16 |
||||
for(int k=0; k<16; k++) |
||||
message[k] = inpHash[k]; |
||||
|
||||
#pragma unroll 14 |
||||
for(int k=1; k<15; k++) |
||||
message[k+16] = 0; |
||||
|
||||
message[16] = 0x80; |
||||
message[31] = 0x01000000; |
||||
|
||||
#pragma unroll 32 |
||||
for(int u=0; u<32; u++) |
||||
state[u] = message[u]; |
||||
state[31] ^= 0x20000; |
||||
|
||||
// Perm |
||||
quark_groestl512_perm_P(state, mixtabs); |
||||
state[31] ^= 0x20000; |
||||
quark_groestl512_perm_Q(message, mixtabs); |
||||
|
||||
#pragma unroll 32 |
||||
for(int u=0;u<32;u++) state[u] ^= message[u]; |
||||
|
||||
#pragma unroll 32 |
||||
for(int u=0;u<32;u++) message[u] = state[u]; |
||||
|
||||
quark_groestl512_perm_P(message, mixtabs); |
||||
|
||||
#pragma unroll 32 |
||||
for(int u=0;u<32;u++) state[u] ^= message[u]; |
||||
|
||||
// Erzeugten Hash rausschreiben |
||||
uint32_t *outpHash = &g_hash[hashPosition * 16]; |
||||
|
||||
#pragma unroll 16 |
||||
for(int k=0;k<16;k++) outpHash[k] = state[k+16]; |
||||
} |
||||
#endif |
||||
} |
||||
|
||||
#define texDef(id, texname, texmem, texsource, texsize) { \ |
||||
unsigned int *texmem; \ |
||||
cudaMalloc(&texmem, texsize); \ |
||||
d_textures[thr_id][id] = texmem; \ |
||||
cudaMemcpy(texmem, texsource, texsize, cudaMemcpyHostToDevice); \ |
||||
texname.normalized = 0; \ |
||||
texname.filterMode = cudaFilterModePoint; \ |
||||
texname.addressMode[0] = cudaAddressModeClamp; \ |
||||
{ cudaChannelFormatDesc channelDesc = cudaCreateChannelDesc<unsigned int>(); \ |
||||
cudaBindTexture(NULL, &texname, texmem, &channelDesc, texsize ); \ |
||||
} \ |
||||
} |
||||
|
||||
__host__ |
||||
void quark_groestl512_sm20_init(int thr_id, uint32_t threads) |
||||
{ |
||||
// Texturen mit obigem Makro initialisieren |
||||
texDef(0, t0up1, d_T0up, T0up_cpu, sizeof(uint32_t)*256); |
||||
texDef(1, t0dn1, d_T0dn, T0dn_cpu, sizeof(uint32_t)*256); |
||||
texDef(2, t1up1, d_T1up, T1up_cpu, sizeof(uint32_t)*256); |
||||
texDef(3, t1dn1, d_T1dn, T1dn_cpu, sizeof(uint32_t)*256); |
||||
texDef(4, t2up1, d_T2up, T2up_cpu, sizeof(uint32_t)*256); |
||||
texDef(5, t2dn1, d_T2dn, T2dn_cpu, sizeof(uint32_t)*256); |
||||
texDef(6, t3up1, d_T3up, T3up_cpu, sizeof(uint32_t)*256); |
||||
texDef(7, t3dn1, d_T3dn, T3dn_cpu, sizeof(uint32_t)*256); |
||||
} |
||||
|
||||
__host__ |
||||
void quark_groestl512_sm20_free(int thr_id) |
||||
{ |
||||
for (int i=0; i<8; i++) |
||||
cudaFree(d_textures[thr_id][i]); |
||||
} |
||||
|
||||
__host__ |
||||
void quark_groestl512_sm20_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order) |
||||
{ |
||||
int threadsperblock = 512; |
||||
|
||||
dim3 grid((threads + threadsperblock-1)/threadsperblock); |
||||
dim3 block(threadsperblock); |
||||
|
||||
size_t shared_size = 8 * 256 * sizeof(uint32_t); |
||||
|
||||
quark_groestl512_gpu_hash_64<<<grid, block, shared_size>>>(threads, startNounce, d_hash, d_nonceVector); |
||||
|
||||
// MyStreamSynchronize(NULL, order, thr_id); |
||||
} |
||||
|
||||
__host__ |
||||
void quark_doublegroestl512_sm20_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order) |
||||
{ |
||||
int threadsperblock = 512; |
||||
|
||||
dim3 grid((threads + threadsperblock-1)/threadsperblock); |
||||
dim3 block(threadsperblock); |
||||
|
||||
size_t shared_size = 8 * 256 * sizeof(uint32_t); |
||||
|
||||
quark_groestl512_gpu_hash_64<<<grid, block, shared_size>>>(threads, startNounce, d_hash, d_nonceVector); |
||||
quark_groestl512_gpu_hash_64<<<grid, block, shared_size>>>(threads, startNounce, d_hash, d_nonceVector); |
||||
|
||||
// MyStreamSynchronize(NULL, order, thr_id); |
||||
} |
||||
@ -0,0 +1,111 @@
@@ -0,0 +1,111 @@
|
||||
/** |
||||
* Simplified groestl512 big perm code |
||||
* tpruvot - 2017 |
||||
*/ |
||||
|
||||
#ifdef __INTELLISENSE__ |
||||
#define __CUDA_ARCH__ 210 |
||||
#define __CUDACC__ |
||||
#include <cuda_helper.h> |
||||
#include <cuda_texture_types.h> |
||||
#define __byte_perm(a,b,c) (a) |
||||
#define tex1Dfetch(t, n) (n) |
||||
#endif |
||||
|
||||
// todo: merge with cuda_quark_groestl512_sm20.cu (used for groestl512-80) |
||||
|
||||
#if __CUDA_ARCH__ < 300 || defined(_DEBUG) |
||||
|
||||
#ifndef SPH_C32 |
||||
#define SPH_C32(x) ((uint32_t)(x ## U)) |
||||
#define SPH_T32(x) ((x) & SPH_C32(0xFFFFFFFF)) |
||||
#endif |
||||
|
||||
#ifndef PC32up |
||||
#define PC32up(j, r) ((uint32_t)((j) + (r))) |
||||
#define PC32dn(j, r) 0 |
||||
#define QC32up(j, r) 0xFFFFFFFF |
||||
#define QC32dn(j, r) (((uint32_t)(r) << 24) ^ SPH_T32(~((uint32_t)(j) << 24))) |
||||
#endif |
||||
|
||||
#define tT0up(x) tex1Dfetch(t0up1, x) |
||||
#define tT0dn(x) tex1Dfetch(t0dn1, x) |
||||
#define tT1up(x) tex1Dfetch(t1up1, x) |
||||
#define tT1dn(x) tex1Dfetch(t1dn1, x) |
||||
#define tT2up(x) tex1Dfetch(t2up1, x) |
||||
#define tT2dn(x) tex1Dfetch(t2dn1, x) |
||||
#define tT3up(x) tex1Dfetch(t3up1, x) |
||||
#define tT3dn(x) tex1Dfetch(t3dn1, x) |
||||
|
||||
#undef B32_0 |
||||
#define B32_0(x) ((x) & 0xFFu) |
||||
|
||||
__device__ __forceinline__ |
||||
static void tex_groestl512_perm_P(uint32_t *a) |
||||
{ |
||||
#pragma unroll 1 |
||||
for(int r=0; r<14; r++) |
||||
{ |
||||
uint32_t t[32]; |
||||
|
||||
#pragma unroll 16 |
||||
for (int k=0; k<16; k++) |
||||
a[(k*2)+0] ^= PC32up(k<< 4, r); |
||||
|
||||
#pragma unroll 16 |
||||
for(int k=0; k<32; k+=2) |
||||
{ |
||||
uint32_t t0_0 = B32_0(a[(k ) & 0x1f]), t9_0 = B32_0(a[(k + 9) & 0x1f]); |
||||
uint32_t t2_1 = B32_1(a[(k + 2) & 0x1f]), t11_1 = B32_1(a[(k + 11) & 0x1f]); |
||||
uint32_t t4_2 = B32_2(a[(k + 4) & 0x1f]), t13_2 = B32_2(a[(k + 13) & 0x1f]); |
||||
uint32_t t6_3 = B32_3(a[(k + 6) & 0x1f]), t23_3 = B32_3(a[(k + 23) & 0x1f]); |
||||
|
||||
t[k + 0] = tT0up( t0_0 ) ^ tT1up( t2_1 ) ^ tT2up( t4_2 ) ^ tT3up( t6_3 ) ^ |
||||
tT0dn( t9_0 ) ^ tT1dn( t11_1 ) ^ tT2dn( t13_2 ) ^ tT3dn( t23_3 ); |
||||
|
||||
t[k + 1] = tT0dn( t0_0 ) ^ tT1dn( t2_1 ) ^ tT2dn( t4_2 ) ^ tT3dn( t6_3 ) ^ |
||||
tT0up( t9_0 ) ^ tT1up( t11_1 ) ^ tT2up( t13_2 ) ^ tT3up( t23_3 ); |
||||
} |
||||
|
||||
#pragma unroll 32 |
||||
for(int k=0; k<32; k++) |
||||
a[k] = t[k]; |
||||
} |
||||
} |
||||
|
||||
__device__ __forceinline__ |
||||
static void tex_groestl512_perm_Q(uint32_t *a) |
||||
{ |
||||
#pragma unroll 1 |
||||
for(int r=0; r<14; r++) |
||||
{ |
||||
uint32_t t[32]; |
||||
|
||||
#pragma unroll 16 |
||||
for (int k=0; k<16; k++) { |
||||
a[(k*2)+0] ^= QC32up(k<< 4, r); |
||||
a[(k*2)+1] ^= QC32dn(k<< 4, r); |
||||
} |
||||
|
||||
#pragma unroll 16 |
||||
for(int k=0; k<32; k+=2) |
||||
{ |
||||
uint32_t t2_0 = B32_0(a[(k + 2) & 0x1f]), t1_0 = B32_0(a[(k + 1) & 0x1f]); |
||||
uint32_t t6_1 = B32_1(a[(k + 6) & 0x1f]), t5_1 = B32_1(a[(k + 5) & 0x1f]); |
||||
uint32_t t10_2 = B32_2(a[(k + 10) & 0x1f]), t9_2 = B32_2(a[(k + 9) & 0x1f]); |
||||
uint32_t t22_3 = B32_3(a[(k + 22) & 0x1f]), t13_3 = B32_3(a[(k + 13) & 0x1f]); |
||||
|
||||
t[k + 0] = tT0up( t2_0 ) ^ tT1up( t6_1 ) ^ tT2up( t10_2 ) ^ tT3up( t22_3 ) ^ |
||||
tT0dn( t1_0 ) ^ tT1dn( t5_1 ) ^ tT2dn( t9_2 ) ^ tT3dn( t13_3 ); |
||||
|
||||
t[k + 1] = tT0dn( t2_0 ) ^ tT1dn( t6_1 ) ^ tT2dn( t10_2 ) ^ tT3dn( t22_3 ) ^ |
||||
tT0up( t1_0 ) ^ tT1up( t5_1 ) ^ tT2up( t9_2 ) ^ tT3up( t13_3 ); |
||||
} |
||||
|
||||
#pragma unroll 32 |
||||
for(int k=0; k<32; k++) |
||||
a[k] = t[k]; |
||||
} |
||||
} |
||||
|
||||
#endif |
||||
Loading…
Reference in new issue