Xiaobaibai
1 year ago
2 changed files with 591 additions and 0 deletions
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/* NEON implementation of sin, cos, exp and log
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Inspired by Intel Approximate Math library, and based on the |
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corresponding algorithms of the cephes math library |
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*/ |
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/* Copyright (C) 2011 Julien Pommier
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This software is provided 'as-is', without any express or implied |
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warranty. In no event will the authors be held liable for any damages |
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arising from the use of this software. |
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Permission is granted to anyone to use this software for any purpose, |
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including commercial applications, and to alter it and redistribute it |
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freely, subject to the following restrictions: |
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1. The origin of this software must not be misrepresented; you must not |
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claim that you wrote the original software. If you use this software |
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in a product, an acknowledgment in the product documentation would be |
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appreciated but is not required. |
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2. Altered source versions must be plainly marked as such, and must not be |
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misrepresented as being the original software. |
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3. This notice may not be removed or altered from any source distribution. |
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(this is the zlib license) |
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*/ |
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#include <arm_neon.h> |
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typedef float32x4_t v4sf; // vector of 4 float
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typedef uint32x4_t v4su; // vector of 4 uint32
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typedef int32x4_t v4si; // vector of 4 uint32
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#define s4f_x(s4f) vgetq_lane_f32(s4f, 0) |
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#define s4f_y(s4f) vgetq_lane_f32(s4f, 1) |
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#define s4f_z(s4f) vgetq_lane_f32(s4f, 2) |
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#define s4f_w(s4f) vgetq_lane_f32(s4f, 3) |
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#define c_inv_mant_mask ~0x7f800000u |
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#define c_cephes_SQRTHF 0.707106781186547524 |
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#define c_cephes_log_p0 7.0376836292E-2 |
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#define c_cephes_log_p1 - 1.1514610310E-1 |
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#define c_cephes_log_p2 1.1676998740E-1 |
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#define c_cephes_log_p3 - 1.2420140846E-1 |
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#define c_cephes_log_p4 + 1.4249322787E-1 |
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#define c_cephes_log_p5 - 1.6668057665E-1 |
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#define c_cephes_log_p6 + 2.0000714765E-1 |
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#define c_cephes_log_p7 - 2.4999993993E-1 |
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#define c_cephes_log_p8 + 3.3333331174E-1 |
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#define c_cephes_log_q1 -2.12194440e-4 |
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#define c_cephes_log_q2 0.693359375 |
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/* natural logarithm computed for 4 simultaneous float
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return NaN for x <= 0 |
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*/ |
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inline v4sf log_ps(v4sf x) { |
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v4sf one = vdupq_n_f32(1); |
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x = vmaxq_f32(x, vdupq_n_f32(0)); /* force flush to zero on denormal values */ |
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v4su invalid_mask = vcleq_f32(x, vdupq_n_f32(0)); |
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v4si ux = vreinterpretq_s32_f32(x); |
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v4si emm0 = vshrq_n_s32(ux, 23); |
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/* keep only the fractional part */ |
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ux = vandq_s32(ux, vdupq_n_s32(c_inv_mant_mask)); |
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ux = vorrq_s32(ux, vreinterpretq_s32_f32(vdupq_n_f32(0.5f))); |
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x = vreinterpretq_f32_s32(ux); |
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emm0 = vsubq_s32(emm0, vdupq_n_s32(0x7f)); |
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v4sf e = vcvtq_f32_s32(emm0); |
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e = vaddq_f32(e, one); |
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/* part2:
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if( x < SQRTHF ) { |
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e -= 1; |
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x = x + x - 1.0; |
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} else { x = x - 1.0; } |
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*/ |
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v4su mask = vcltq_f32(x, vdupq_n_f32(c_cephes_SQRTHF)); |
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v4sf tmp = vreinterpretq_f32_u32(vandq_u32(vreinterpretq_u32_f32(x), mask)); |
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x = vsubq_f32(x, one); |
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e = vsubq_f32(e, vreinterpretq_f32_u32(vandq_u32(vreinterpretq_u32_f32(one), mask))); |
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x = vaddq_f32(x, tmp); |
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v4sf z = vmulq_f32(x,x); |
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v4sf y = vdupq_n_f32(c_cephes_log_p0); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p1)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p2)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p3)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p4)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p5)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p6)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p7)); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, vdupq_n_f32(c_cephes_log_p8)); |
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y = vmulq_f32(y, x); |
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y = vmulq_f32(y, z); |
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tmp = vmulq_f32(e, vdupq_n_f32(c_cephes_log_q1)); |
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y = vaddq_f32(y, tmp); |
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tmp = vmulq_f32(z, vdupq_n_f32(0.5f)); |
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y = vsubq_f32(y, tmp); |
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tmp = vmulq_f32(e, vdupq_n_f32(c_cephes_log_q2)); |
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x = vaddq_f32(x, y); |
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x = vaddq_f32(x, tmp); |
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x = vreinterpretq_f32_u32(vorrq_u32(vreinterpretq_u32_f32(x), invalid_mask)); // negative arg will be NAN
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return x; |
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} |
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#define c_exp_hi 88.3762626647949f |
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#define c_exp_lo -88.3762626647949f |
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#define c_cephes_LOG2EF 1.44269504088896341 |
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#define c_cephes_exp_C1 0.693359375 |
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#define c_cephes_exp_C2 -2.12194440e-4 |
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#define c_cephes_exp_p0 1.9875691500E-4 |
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#define c_cephes_exp_p1 1.3981999507E-3 |
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#define c_cephes_exp_p2 8.3334519073E-3 |
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#define c_cephes_exp_p3 4.1665795894E-2 |
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#define c_cephes_exp_p4 1.6666665459E-1 |
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#define c_cephes_exp_p5 5.0000001201E-1 |
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/* exp() computed for 4 float at once */ |
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inline v4sf exp_ps(v4sf x) { |
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v4sf tmp, fx; |
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v4sf one = vdupq_n_f32(1); |
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x = vminq_f32(x, vdupq_n_f32(c_exp_hi)); |
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x = vmaxq_f32(x, vdupq_n_f32(c_exp_lo)); |
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/* express exp(x) as exp(g + n*log(2)) */ |
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fx = vmlaq_f32(vdupq_n_f32(0.5f), x, vdupq_n_f32(c_cephes_LOG2EF)); |
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/* perform a floorf */ |
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tmp = vcvtq_f32_s32(vcvtq_s32_f32(fx)); |
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/* if greater, substract 1 */ |
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v4su mask = vcgtq_f32(tmp, fx); |
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mask = vandq_u32(mask, vreinterpretq_u32_f32(one)); |
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fx = vsubq_f32(tmp, vreinterpretq_f32_u32(mask)); |
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tmp = vmulq_f32(fx, vdupq_n_f32(c_cephes_exp_C1)); |
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v4sf z = vmulq_f32(fx, vdupq_n_f32(c_cephes_exp_C2)); |
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x = vsubq_f32(x, tmp); |
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x = vsubq_f32(x, z); |
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static const float cephes_exp_p[6] = { c_cephes_exp_p0, c_cephes_exp_p1, c_cephes_exp_p2, c_cephes_exp_p3, c_cephes_exp_p4, c_cephes_exp_p5 }; |
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v4sf y = vld1q_dup_f32(cephes_exp_p+0); |
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v4sf c1 = vld1q_dup_f32(cephes_exp_p+1); |
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v4sf c2 = vld1q_dup_f32(cephes_exp_p+2); |
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v4sf c3 = vld1q_dup_f32(cephes_exp_p+3); |
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v4sf c4 = vld1q_dup_f32(cephes_exp_p+4); |
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v4sf c5 = vld1q_dup_f32(cephes_exp_p+5); |
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y = vmulq_f32(y, x); |
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z = vmulq_f32(x,x); |
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y = vaddq_f32(y, c1); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, c2); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, c3); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, c4); |
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y = vmulq_f32(y, x); |
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y = vaddq_f32(y, c5); |
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y = vmulq_f32(y, z); |
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y = vaddq_f32(y, x); |
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y = vaddq_f32(y, one); |
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/* build 2^n */ |
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int32x4_t mm; |
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mm = vcvtq_s32_f32(fx); |
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mm = vaddq_s32(mm, vdupq_n_s32(0x7f)); |
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mm = vshlq_n_s32(mm, 23); |
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v4sf pow2n = vreinterpretq_f32_s32(mm); |
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y = vmulq_f32(y, pow2n); |
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return y; |
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} |
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#define c_minus_cephes_DP1 -0.78515625 |
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#define c_minus_cephes_DP2 -2.4187564849853515625e-4 |
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#define c_minus_cephes_DP3 -3.77489497744594108e-8 |
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#define c_sincof_p0 -1.9515295891E-4 |
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#define c_sincof_p1 8.3321608736E-3 |
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#define c_sincof_p2 -1.6666654611E-1 |
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#define c_coscof_p0 2.443315711809948E-005 |
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#define c_coscof_p1 -1.388731625493765E-003 |
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#define c_coscof_p2 4.166664568298827E-002 |
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#define c_cephes_FOPI 1.27323954473516 // 4 / M_PI
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/* evaluation of 4 sines & cosines at once.
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The code is the exact rewriting of the cephes sinf function. |
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Precision is excellent as long as x < 8192 (I did not bother to |
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take into account the special handling they have for greater values |
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-- it does not return garbage for arguments over 8192, though, but |
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the extra precision is missing). |
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Note that it is such that sinf((float)M_PI) = 8.74e-8, which is the |
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surprising but correct result. |
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Note also that when you compute sin(x), cos(x) is available at |
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almost no extra price so both sin_ps and cos_ps make use of |
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sincos_ps.. |
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*/ |
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inline void sincos_ps(v4sf x, v4sf *ysin, v4sf *ycos) { // any x
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v4sf y; |
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v4su emm2; |
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v4su sign_mask_sin, sign_mask_cos; |
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sign_mask_sin = vcltq_f32(x, vdupq_n_f32(0)); |
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x = vabsq_f32(x); |
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/* scale by 4/Pi */ |
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y = vmulq_n_f32(x, c_cephes_FOPI); |
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/* store the integer part of y in mm0 */ |
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emm2 = vcvtq_u32_f32(y); |
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/* j=(j+1) & (~1) (see the cephes sources) */ |
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emm2 = vaddq_u32(emm2, vdupq_n_u32(1)); |
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emm2 = vandq_u32(emm2, vdupq_n_u32(~1)); |
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y = vcvtq_f32_u32(emm2); |
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/* get the polynom selection mask
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there is one polynom for 0 <= x <= Pi/4 |
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and another one for Pi/4<x<=Pi/2 |
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Both branches will be computed. |
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*/ |
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v4su poly_mask = vtstq_u32(emm2, vdupq_n_u32(2)); |
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/* The magic pass: "Extended precision modular arithmetic"
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x = ((x - y * DP1) - y * DP2) - y * DP3; */ |
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x = vfmaq_n_f32(x, y, c_minus_cephes_DP1); |
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x = vfmaq_n_f32(x, y, c_minus_cephes_DP2); |
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x = vfmaq_n_f32(x, y, c_minus_cephes_DP3); |
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sign_mask_sin = veorq_u32(sign_mask_sin, vtstq_u32(emm2, vdupq_n_u32(4))); |
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sign_mask_cos = vtstq_u32(vsubq_u32(emm2, vdupq_n_u32(2)), vdupq_n_u32(4)); |
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/* Evaluate the first polynom (0 <= x <= Pi/4) in y1,
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and the second polynom (Pi/4 <= x <= 0) in y2 */ |
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v4sf z = vmulq_f32(x,x); |
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v4sf y1, y2; |
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y1 = vfmaq_n_f32(vdupq_n_f32(c_coscof_p1), z, c_coscof_p0); |
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y2 = vfmaq_n_f32(vdupq_n_f32(c_sincof_p1), z, c_sincof_p0); |
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y1 = vfmaq_f32(vdupq_n_f32(c_coscof_p2), y1, z); |
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y2 = vfmaq_f32(vdupq_n_f32(c_sincof_p2), y2, z); |
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y1 = vmulq_f32(y1, z); |
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y2 = vmulq_f32(y2, z); |
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y1 = vmulq_f32(y1, z); |
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y1 = vfmsq_n_f32(y1, z, 0.5f); |
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y2 = vfmaq_f32(x, y2, x); |
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y1 = vaddq_f32(y1, vdupq_n_f32(1)); |
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/* select the correct result from the two polynoms */ |
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v4sf ys = vbslq_f32(poly_mask, y1, y2); |
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v4sf yc = vbslq_f32(poly_mask, y2, y1); |
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*ysin = vbslq_f32(sign_mask_sin, vnegq_f32(ys), ys); |
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*ycos = vbslq_f32(sign_mask_cos, yc, vnegq_f32(yc)); |
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} |
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inline v4sf sin_ps(v4sf x) { |
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v4sf ysin, ycos; |
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sincos_ps(x, &ysin, &ycos); |
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return ysin; |
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} |
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inline v4sf cos_ps(v4sf x) { |
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v4sf ysin, ycos; |
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sincos_ps(x, &ysin, &ycos); |
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return ycos; |
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} |
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static const float asinf_lut[7] = { |
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1.5707961728, |
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-0.2145852647, |
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0.0887556286, |
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-0.0488025043, |
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0.0268999482, |
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-0.0111462294, |
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0.0022959648 |
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}; |
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inline void asincos_ps(float32x4_t x, float32x4_t* yasin, float32x4_t* yacos) |
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{ |
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float32x4_t one = vdupq_n_f32(1); |
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float32x4_t negone = vdupq_n_f32(-1); |
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float32x4_t lut[7]; |
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float32x4_t xv[5]; |
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float32x4_t sat = vdupq_n_f32(0.9999999f); |
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float32x4_t m_pi_2 = vdupq_n_f32(1.570796326); |
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for (int i = 0; i <= 6; i++) |
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lut[i] = vdupq_n_f32(asinf_lut[i]); |
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uint32x4_t sign_mask_asin = vcltq_f32(x, vdupq_n_f32(0)); |
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x = vabsq_f32(x); |
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uint32x4_t saturate = vcgeq_f32(x, one); |
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x = vbslq_f32(saturate, sat, x); |
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float32x4_t y = vsubq_f32(one, x); |
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y = vsqrtq_f32(y); |
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xv[0] = vmulq_f32(x, x); |
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for (int i = 1; i < 5; i++) |
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xv[i] = vmulq_f32(xv[i - 1], x); |
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float32x4_t a0 = vaddq_f32(lut[0], vmulq_f32(lut[1], x)); |
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float32x4_t a1 = vaddq_f32(vmulq_f32(lut[2], xv[0]), vmulq_f32(lut[3], xv[1])); |
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float32x4_t a2 = vaddq_f32(vmulq_f32(lut[4], xv[2]), vmulq_f32(lut[5], xv[3])); |
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float32x4_t a3 = vmulq_f32(lut[6], xv[4]); |
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float32x4_t phx = vaddq_f32(vaddq_f32(a0, vaddq_f32(a1, a2)), a3); |
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|
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float32x4_t arcsinx = vmulq_f32(y, phx); |
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arcsinx = vsubq_f32(m_pi_2, arcsinx); |
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float32x4_t arcnsinx = vmulq_f32(negone, arcsinx); |
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arcsinx = vbslq_f32(sign_mask_asin, arcnsinx, arcsinx); |
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*yasin = arcsinx; |
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*yacos = vsubq_f32(m_pi_2, arcsinx); |
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} |
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inline float32x4_t asin_ps(float32x4_t x) |
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{ |
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float32x4_t yasin, yacos; |
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asincos_ps(x, &yasin, &yacos); |
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return yasin; |
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} |
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|
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inline float32x4_t acos_ps(float32x4_t x) |
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{ |
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float32x4_t yasin, yacos; |
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|
asincos_ps(x, &yasin, &yacos); |
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|
return yacos; |
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|
} |
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Loading…
Reference in new issue