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Merge pull request #476 from kanoi/master

avalon for timeout allow d='calculate it' and fix uninitialised
nfactor-troky
kanoi 11 years ago
parent
commit
f3837916fd
  1. 1
      ASIC-README
  2. 25
      driver-avalon.c
  3. 2
      driver-avalon.h

1
ASIC-README

@ -169,6 +169,7 @@ to replace it. It should be changed according to the frequency (last setting).
It is possible to set this a little lower if you are trying to tune for short It is possible to set this a little lower if you are trying to tune for short
block mining (eg p2pool) but much lower and the device will start creating block mining (eg p2pool) but much lower and the device will start creating
duplicate shares. duplicate shares.
A value of 'd' means cgminer will calculate it for you based on the frequency
Sample settings for valid different frequencies (last 2 values): Sample settings for valid different frequencies (last 2 values):
34:375 * 34:375 *

25
driver-avalon.c

@ -17,6 +17,7 @@
#include <stdio.h> #include <stdio.h>
#include <sys/time.h> #include <sys/time.h>
#include <sys/types.h> #include <sys/types.h>
#include <ctype.h>
#include <dirent.h> #include <dirent.h>
#include <unistd.h> #include <unistd.h>
#ifndef WIN32 #ifndef WIN32
@ -332,11 +333,17 @@ static int avalon_reset(struct cgpu_info *avalon, bool initial)
return 0; return 0;
} }
static int avalon_calc_timeout(int frequency)
{
return AVALON_TIMEOUT_FACTOR / frequency;
}
static bool get_options(int this_option_offset, int *baud, int *miner_count, static bool get_options(int this_option_offset, int *baud, int *miner_count,
int *asic_count, int *timeout, int *frequency) int *asic_count, int *timeout, int *frequency)
{ {
char buf[BUFSIZ+1]; char buf[BUFSIZ+1];
char *ptr, *comma, *colon, *colon2, *colon3, *colon4; char *ptr, *comma, *colon, *colon2, *colon3, *colon4;
bool timeout_default;
size_t max; size_t max;
int i, tmp; int i, tmp;
@ -419,11 +426,15 @@ static bool get_options(int this_option_offset, int *baud, int *miner_count,
colon2, AVALON_DEFAULT_ASIC_NUM); colon2, AVALON_DEFAULT_ASIC_NUM);
} }
timeout_default = false;
if (colon3 && *colon3) { if (colon3 && *colon3) {
colon4 = strchr(colon3, ':'); colon4 = strchr(colon3, ':');
if (colon4) if (colon4)
*(colon4++) = '\0'; *(colon4++) = '\0';
if (tolower(*colon3) == 'd')
timeout_default = true;
else {
tmp = atoi(colon3); tmp = atoi(colon3);
if (tmp > 0 && tmp <= 0xff) if (tmp > 0 && tmp <= 0xff)
*timeout = tmp; *timeout = tmp;
@ -432,6 +443,7 @@ static bool get_options(int this_option_offset, int *baud, int *miner_count,
"timeout (%s) must be 1 ~ %d", "timeout (%s) must be 1 ~ %d",
colon3, 0xff); colon3, 0xff);
} }
}
if (colon4 && *colon4) { if (colon4 && *colon4) {
tmp = atoi(colon4); tmp = atoi(colon4);
if (tmp < AVALON_MIN_FREQUENCY || tmp > AVALON_MAX_FREQUENCY) { if (tmp < AVALON_MIN_FREQUENCY || tmp > AVALON_MAX_FREQUENCY) {
@ -439,6 +451,8 @@ static bool get_options(int this_option_offset, int *baud, int *miner_count,
AVALON_MIN_FREQUENCY, AVALON_MAX_FREQUENCY); AVALON_MIN_FREQUENCY, AVALON_MAX_FREQUENCY);
} }
*frequency = tmp; *frequency = tmp;
if (timeout_default)
*timeout = avalon_calc_timeout(*frequency);
} }
} }
} }
@ -645,8 +659,7 @@ static int bitburner_get_core_voltage(struct cgpu_info *avalon)
static bool avalon_detect_one(libusb_device *dev, struct usb_find_devices *found) static bool avalon_detect_one(libusb_device *dev, struct usb_find_devices *found)
{ {
int baud, uninitialised_var(miner_count), uninitialised_var(asic_count), int baud, miner_count, asic_count, timeout, frequency;
uninitialised_var(timeout), frequency = 0;
int this_option_offset = ++option_offset; int this_option_offset = ++option_offset;
struct avalon_info *info; struct avalon_info *info;
struct cgpu_info *avalon; struct cgpu_info *avalon;
@ -655,6 +668,12 @@ static bool avalon_detect_one(libusb_device *dev, struct usb_find_devices *found
avalon = usb_alloc_cgpu(&avalon_drv, AVALON_MINER_THREADS); avalon = usb_alloc_cgpu(&avalon_drv, AVALON_MINER_THREADS);
baud = AVALON_IO_SPEED;
miner_count = AVALON_DEFAULT_MINER_NUM;
asic_count = AVALON_DEFAULT_ASIC_NUM;
timeout = AVALON_DEFAULT_TIMEOUT;
frequency = AVALON_DEFAULT_FREQUENCY;
configured = get_options(this_option_offset, &baud, &miner_count, configured = get_options(this_option_offset, &baud, &miner_count,
&asic_count, &timeout, &frequency); &asic_count, &timeout, &frequency);
@ -910,7 +929,7 @@ static void avalon_rotate_array(struct cgpu_info *avalon)
static void avalon_set_timeout(struct avalon_info *info) static void avalon_set_timeout(struct avalon_info *info)
{ {
info->timeout = AVALON_TIMEOUT_FACTOR / info->frequency; info->timeout = avalon_calc_timeout(info->frequency);
} }
static void avalon_set_freq(struct cgpu_info *avalon, int frequency) static void avalon_set_freq(struct cgpu_info *avalon, int frequency)

2
driver-avalon.h

@ -36,7 +36,7 @@
#define BITBURNER_DEFAULT_CORE_VOLTAGE 1200 /* in millivolts */ #define BITBURNER_DEFAULT_CORE_VOLTAGE 1200 /* in millivolts */
#define BITBURNER_MIN_COREMV 1000 #define BITBURNER_MIN_COREMV 1000
/* change here if you want to risk killing it :) */ /* change here if you want to risk killing it :) */
#define BITBURNER_MAX_COREMV 1310 #define BITBURNER_MAX_COREMV 1400
#define AVALON_DEFAULT_TIMEOUT 0x2D #define AVALON_DEFAULT_TIMEOUT 0x2D

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