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@ -829,6 +829,7 @@ static int64_t avalon_scanhash(struct thr_info *thr) |
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uint32_t nonce; |
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uint32_t nonce; |
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int64_t hash_count; |
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int64_t hash_count; |
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static int first_try = 0; |
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static int first_try = 0; |
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int result_wrong; |
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avalon = thr->cgpu; |
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avalon = thr->cgpu; |
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works = avalon->works; |
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works = avalon->works; |
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@ -890,6 +891,7 @@ static int64_t avalon_scanhash(struct thr_info *thr) |
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elapsed.tv_sec = elapsed.tv_usec = 0; |
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elapsed.tv_sec = elapsed.tv_usec = 0; |
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gettimeofday(&tv_start, NULL); |
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gettimeofday(&tv_start, NULL); |
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result_wrong = 0; |
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hash_count = 0; |
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hash_count = 0; |
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while (true) { |
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while (true) { |
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full = avalon_buffer_full(fd); |
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full = avalon_buffer_full(fd); |
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@ -917,6 +919,7 @@ static int64_t avalon_scanhash(struct thr_info *thr) |
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if (!avalon_decode_nonce(thr, &ar, &nonce)) { |
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if (!avalon_decode_nonce(thr, &ar, &nonce)) { |
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info->no_matching_work++; |
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info->no_matching_work++; |
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result_wrong++; |
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if (opt_debug) { |
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if (opt_debug) { |
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timersub(&tv_finish, &tv_start, &elapsed); |
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timersub(&tv_finish, &tv_start, &elapsed); |
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@ -936,6 +939,17 @@ static int64_t avalon_scanhash(struct thr_info *thr) |
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elapsed.tv_sec, elapsed.tv_usec); |
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elapsed.tv_sec, elapsed.tv_usec); |
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} |
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} |
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} |
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} |
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if (result_wrong >= avalon_get_work_count && ret != AVA_GETS_RESTART) { |
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/* This mean FPGA controller gave all wrong results, so
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* try to reset the Avalon */ |
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do_avalon_close(thr); |
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applog(LOG_ERR, |
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"AVA%i: FPGA controller mess up", avalon->device_id); |
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dev_error(avalon, REASON_DEV_COMMS_ERROR); |
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sleep(1); |
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avalon_init(avalon); |
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return 0; |
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} |
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avalon_free_work_array(thr); |
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avalon_free_work_array(thr); |
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