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simd512: restore full maxwell power (typo)

2upstream
Tanguy Pruvot 10 years ago
parent
commit
d0316220dd
  1. 4
      x11/cuda_x11_simd512.cu

4
x11/cuda_x11_simd512.cu

@ -673,10 +673,10 @@ void x11_simd512_cpu_hash_64(int thr_id, int threads, uint32_t startNounce, uint @@ -673,10 +673,10 @@ void x11_simd512_cpu_hash_64(int thr_id, int threads, uint32_t startNounce, uint
dim3 grid((threads + threadsperblock-1) / threadsperblock);
dim3 grid8(((threads + threadsperblock - 1) / threadsperblock) * 8);
x11_simd512_gpu_expand_64 <<<grid8, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id]);
if (device_sm[device_map[thr_id]] >= 500) {
x11_simd512_gpu_compress_64_maxwell <<< grid8, block >>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
x11_simd512_gpu_compress_64_maxwell <<< grid, block >>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
} else {
x11_simd512_gpu_compress1_64 <<< grid, block >>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
x11_simd512_gpu_compress2_64 <<< grid, block >>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);

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