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163 lines
4.3 KiB
163 lines
4.3 KiB
#pragma once |
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#include "nvapi.h" |
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NvAPI_Status nvapi_dll_init(); |
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typedef struct { |
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NvU32 version; |
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NvU32 flags; |
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struct |
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{ |
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NvU32 pstate; // Assumption |
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NvU32 unknown1[2]; |
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NvU32 min_power; |
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NvU32 unknown2[2]; |
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NvU32 def_power; |
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NvU32 unknown3[2]; |
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NvU32 max_power; |
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NvU32 unknown4; // 0 |
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} entries[4]; |
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} NVAPI_GPU_POWER_INFO; |
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#define NVAPI_GPU_POWER_INFO_VER MAKE_NVAPI_VERSION(NVAPI_GPU_POWER_INFO, 1) |
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typedef struct { |
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NvU32 version; |
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NvU32 flags; |
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struct { |
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NvU32 unknown1; |
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NvU32 unknown2; |
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NvU32 power; // percent * 1000 |
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NvU32 unknown4; |
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} entries[4]; |
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} NVAPI_GPU_POWER_STATUS; |
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#define NVAPI_GPU_POWER_STATUS_VER MAKE_NVAPI_VERSION(NVAPI_GPU_POWER_STATUS, 1) |
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typedef struct { |
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NvU32 version; |
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NvU32 flags; |
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struct { |
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NvU32 controller; |
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NvU32 unknown; |
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NvS32 min_temp; |
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NvS32 def_temp; |
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NvS32 max_temp; |
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NvU32 defaultFlags; |
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} entries[4]; |
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} NVAPI_GPU_THERMAL_INFO; |
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#define NVAPI_GPU_THERMAL_INFO_VER MAKE_NVAPI_VERSION(NVAPI_GPU_THERMAL_INFO, 2) |
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typedef struct { |
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NvU32 version; |
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NvU32 flags; |
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struct { |
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NvU32 controller; |
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NvU32 value; |
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NvU32 flags; |
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} entries[4]; |
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} NVAPI_GPU_THERMAL_LIMIT; |
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#define NVAPI_GPU_THERMAL_LIMIT_VER MAKE_NVAPI_VERSION(NVAPI_GPU_THERMAL_LIMIT, 2) |
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typedef struct { |
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NvU32 version; |
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NvU32 flags; |
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struct { |
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NvU32 voltage_domain; |
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NvU32 current_voltage; |
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} entries[16]; |
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} NVIDIA_GPU_VOLTAGE_DOMAINS_STATUS; |
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#define NVIDIA_GPU_VOLTAGE_DOMAINS_STATUS_VER MAKE_NVAPI_VERSION(NVIDIA_GPU_VOLTAGE_DOMAINS_STATUS, 1) |
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typedef struct { |
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NvU32 version; |
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NvU32 numClocks; // unsure |
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NvU32 nul[8]; |
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struct { |
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NvU32 a; |
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NvU32 clockType; |
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NvU32 c; |
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NvU32 d; |
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NvU32 e; |
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NvU32 f; |
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NvU32 g; |
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NvU32 h; |
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NvU32 i; |
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NvU32 j; |
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NvS32 rangeMax; |
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NvS32 rangeMin; |
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NvS32 tempMax; // ? unsure |
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NvU32 n; |
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NvU32 o; |
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NvU32 p; |
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NvU32 q; |
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NvU32 r; |
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} entries[32]; // NVAPI_MAX_GPU_CLOCKS ? |
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} NVAPI_CLOCKS_RANGE; // 2344 bytes |
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#define NVAPI_CLOCKS_RANGE_VER MAKE_NVAPI_VERSION(NVAPI_CLOCKS_RANGE, 1) |
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// seems to return a clock table mask |
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typedef struct { |
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NvU32 version; |
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NvU32 mask[4]; // 80 bits mask |
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NvU32 buf0[8]; |
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struct { |
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NvU32 a; |
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NvU32 b; |
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NvU32 c; |
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NvU32 d; |
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NvU32 memDelta; // 1 for mem |
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NvU32 gpuDelta; // 1 for gpu |
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} clocks[80 + 23]; |
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NvU32 buf1[916]; |
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} NVAPI_CLOCK_MASKS; // 6188 bytes |
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#define NVAPI_CLOCK_MASKS_VER MAKE_NVAPI_VERSION(NVAPI_CLOCK_MASKS, 1) |
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// contains the gpu/mem clocks deltas |
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typedef struct { |
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NvU32 version; |
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NvU32 mask[4]; // 80 bits mask |
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NvU32 buf0[12]; |
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struct { |
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NvU32 a; |
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NvU32 b; |
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NvU32 c; |
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NvU32 d; |
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NvU32 e; |
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NvS32 freqDelta; // 84000 = +84MHz |
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NvU32 g; |
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NvU32 h; |
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NvU32 i; |
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} gpuDeltas[80]; |
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NvU32 memFilled[23]; // maybe only 4 max |
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NvS32 memDeltas[23]; |
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NvU32 buf1[1529]; |
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} NVAPI_CLOCK_TABLE; // 9248 bytes |
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#define NVAPI_CLOCK_TABLE_VER MAKE_NVAPI_VERSION(NVAPI_CLOCK_TABLE, 1) |
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NvAPI_Status NvAPI_DLL_GetInterfaceVersionString(NvAPI_ShortString string); |
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NvAPI_Status NvAPI_DLL_ClientPowerPoliciesGetInfo(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_POWER_INFO*); |
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NvAPI_Status NvAPI_DLL_ClientPowerPoliciesGetStatus(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_POWER_STATUS*); |
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NvAPI_Status NvAPI_DLL_ClientPowerPoliciesSetStatus(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_POWER_STATUS*); |
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NvAPI_Status NvAPI_DLL_ClientThermalPoliciesGetInfo(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_THERMAL_INFO*); |
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NvAPI_Status NvAPI_DLL_ClientThermalPoliciesGetLimit(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_THERMAL_LIMIT*); |
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NvAPI_Status NvAPI_DLL_ClientThermalPoliciesSetLimit(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_GPU_THERMAL_LIMIT*); |
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NvAPI_Status NvAPI_DLL_GetVoltageDomainsStatus(NvPhysicalGpuHandle hPhysicalGpu, NVIDIA_GPU_VOLTAGE_DOMAINS_STATUS*); |
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// to dig... |
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NvAPI_Status NvAPI_DLL_GetClockBoostRanges(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_CLOCKS_RANGE*); |
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NvAPI_Status NvAPI_DLL_GetClockBoostMask(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_CLOCK_MASKS*); // 0x507B4B59 |
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NvAPI_Status NvAPI_DLL_GetClockBoostTable(NvPhysicalGpuHandle hPhysicalGpu, NVAPI_CLOCK_TABLE*); // 0x23F1B133 |
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NvAPI_Status NvAPI_DLL_GetPerfClocks(NvPhysicalGpuHandle hPhysicalGpu, void* pFreqs); |
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NvAPI_Status NvAPI_DLL_GetSerialNumber(NvPhysicalGpuHandle handle, NvAPI_ShortString serial); |
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NvAPI_Status NvAPI_DLL_SetPstates20(NvPhysicalGpuHandle handle, NV_GPU_PERF_PSTATES20_INFO *pPerfPstatesInfo); |
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NvAPI_Status NvAPI_DLL_Unload(); |
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#define NV_ASSERT(x) { NvAPI_Status ret = x; if(ret != NVAPI_OK) return ret; }
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