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@ -44,6 +44,8 @@ uint32_t clock_prev[MAX_GPUS] = { 0 };
@@ -44,6 +44,8 @@ uint32_t clock_prev[MAX_GPUS] = { 0 };
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uint32_t clock_prev_mem[MAX_GPUS] = { 0 }; |
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uint32_t limit_prev[MAX_GPUS] = { 0 }; |
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static bool nvml_plimit_set = false; |
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/*
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* Wrappers to emulate dlopen() on other systems like Windows |
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*/ |
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@ -525,10 +527,13 @@ int nvml_set_plimit(nvml_handle *nvmlh, int dev_id)
@@ -525,10 +527,13 @@ int nvml_set_plimit(nvml_handle *nvmlh, int dev_id)
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plimit = max(plimit, pmin); |
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rc = nvmlh->nvmlDeviceSetPowerManagementLimit(nvmlh->devs[n], plimit); |
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if (rc != NVML_SUCCESS) { |
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#ifndef WIN32 |
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applog(LOG_WARNING, "GPU #%d: plimit %s", dev_id, nvmlh->nvmlErrorString(rc)); |
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#endif |
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return -1; |
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} else { |
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device_plimit[dev_id] = plimit / 1000; |
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nvml_plimit_set = true; |
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} |
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if (!opt_quiet) { |
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@ -1381,7 +1386,16 @@ int nvapi_pstateinfo(unsigned int devNum)
@@ -1381,7 +1386,16 @@ int nvapi_pstateinfo(unsigned int devNum)
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} |
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uint32_t plim = nvapi_get_plimit(devNum); |
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applog(LOG_RAW, " Power limit is set to %u%%", plim); |
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double min_pw = 0, max_pw = 0; // percent
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NVAPI_GPU_POWER_INFO nfo = { 0 }; |
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nfo.version = NVAPI_GPU_POWER_INFO_VER; |
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ret = NvAPI_DLL_ClientPowerPoliciesGetInfo(phys[devNum], &nfo); |
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if (ret == NVAPI_OK && nfo.valid) { |
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min_pw = (double)nfo.entries[0].min_power / 1000; |
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max_pw = (double)nfo.entries[0].max_power / 1000; |
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} |
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applog(LOG_RAW, " Power limit is set to %u%%, range [%.0f-%.0f%%]", plim, min_pw, max_pw); |
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#if 0 |
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NVAPI_COOLER_SETTINGS *cooler; |
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@ -1812,7 +1826,7 @@ int nvapi_init_settings()
@@ -1812,7 +1826,7 @@ int nvapi_init_settings()
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for (int n=0; n < opt_n_threads; n++) { |
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int dev_id = device_map[n % MAX_GPUS]; |
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if (device_plimit[dev_id] && !hnvml) { |
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if (device_plimit[dev_id] && !nvml_plimit_set) { |
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if (nvapi_set_plimit(nvapi_dev_map[dev_id], device_plimit[dev_id]) == NVAPI_OK) { |
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uint32_t res = nvapi_get_plimit(nvapi_dev_map[dev_id]); |
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gpulog(LOG_INFO, n, "Power limit is set to %u%%", res); |
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