YGGverse/xash3d-fwgs
1
0
Fork 0
mirror of https://github.com/YGGverse/xash3d-fwgs.git synced 2025-01-17 18:40:02 +00:00
Code Issues Projects Releases Wiki Activity

public: build: reorder enums by probability, rename ARCHITECTURE_ ABI macros to just ARCH_ for easier matching

Browse Source
This commit is contained in:
Alibek Omarov 2023-04-17 06:28:31 +03:00
parent c1252b5642
commit e9da3e2976
2 changed files with 21 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
public/build.c
View File

@ -164,8 +164,8 @@ const char *Q_ArchitectureStringByID( const int arch, const uint abi, const int
// no support for big endian ARM here
if( endianness == ENDIANNESS_LITTLE )
{
const int ver = ( abi >> ARCHITECTURE_ARM_VER_SHIFT ) & ARCHITECTURE_ARM_VER_MASK;
const qboolean hardfp = FBitSet( abi, ARCHITECTURE_ARM_HARDFP );
const uint ver = ( abi >> ARCH_ARM_VER_SHIFT ) & ARCH_ARM_VER_MASK;
const qboolean hardfp = FBitSet( abi, ARCH_ARM_HARDFP );
if( is64 )
return "arm64"; // keep as arm64, it's not aarch64!
@ -188,11 +188,11 @@ const char *Q_ArchitectureStringByID( const int arch, const uint abi, const int
case ARCHITECTURE_RISCV:
switch( abi )
{
case ARCHITECTURE_RISCV_FP_SOFT:
case ARCH_RISCV_FP_SOFT:
return is64 ? "riscv64" : "riscv32";
case ARCHITECTURE_RISCV_FP_SINGLE:
case ARCH_RISCV_FP_SINGLE:
return is64 ? "riscv64f" : "riscv32f";
case ARCHITECTURE_RISCV_FP_DOUBLE:
case ARCH_RISCV_FP_DOUBLE:
return is64 ? "riscv64d" : "riscv64f";
}
break;

32
public/buildenums.h
View File

@ -28,10 +28,10 @@ GNU General Public License for more details.
//
//================================================================
#define PLATFORM_WIN32 1
#define PLATFORM_ANDROID 2
#define PLATFORM_LINUX 3
#define PLATFORM_APPLE 4
#define PLATFORM_FREEBSD 5
#define PLATFORM_LINUX 2
#define PLATFORM_FREEBSD 3
#define PLATFORM_ANDROID 4
#define PLATFORM_APPLE 5
#define PLATFORM_NETBSD 6
#define PLATFORM_OPENBSD 7
#define PLATFORM_EMSCRIPTEN 8
@ -82,8 +82,8 @@ GNU General Public License for more details.
// CPU ARCHITECTURE DEFINES
//
//================================================================
#define ARCHITECTURE_AMD64 1
#define ARCHITECTURE_X86 2
#define ARCHITECTURE_X86 1
#define ARCHITECTURE_AMD64 2
#define ARCHITECTURE_ARM 3
#define ARCHITECTURE_MIPS 4
#define ARCHITECTURE_JS 6
@ -131,27 +131,27 @@ GNU General Public License for more details.
//================================================================
#define BIT( n ) ( 1U << ( n ))
#define ARCHITECTURE_ARM_VER_MASK ( BIT( 5 ) - 1 )
#define ARCHITECTURE_ARM_VER_SHIFT 0
#define ARCHITECTURE_ARM_HARDFP BIT( 5 )
#define ARCH_ARM_VER_MASK ( BIT( 5 ) - 1 )
#define ARCH_ARM_VER_SHIFT 0
#define ARCH_ARM_HARDFP BIT( 5 )
#define ARCHITECTURE_RISCV_FP_SOFT 0
#define ARCHITECTURE_RISCV_FP_SINGLE 1
#define ARCHITECTURE_RISCV_FP_DOUBLE 2
#define ARCH_RISCV_FP_SOFT 0
#define ARCH_RISCV_FP_SINGLE 1
#define ARCH_RISCV_FP_DOUBLE 2
#if XASH_ARCHITECTURE == ARCHITECTURE_ARM
#if XASH_ARM_HARDFP
#define XASH_ARCHITECTURE_ABI ( ARCHITECTURE_ARM_HARDFP | XASH_ARM )
#define XASH_ARCHITECTURE_ABI ( ARCH_ARM_HARDFP | XASH_ARM )
#else
#define XASH_ARCHITECTURE_ABI ( XASH_ARM )
#endif
#elif XASH_ARCHITECTURE == ARCHITECTURE_RISCV
#if XASH_RISCV_SOFTFP
#define XASH_ARCHITECTURE_ABI ARCHITECTURE_RISCV_FP_SOFT
#define XASH_ARCHITECTURE_ABI ARCH_RISCV_FP_SOFT
#elif XASH_RISCV_SINGLEFP
#define XASH_ARCHITECTURE_ABI ARCHITECTURE_RISCV_FP_SINGLE
#define XASH_ARCHITECTURE_ABI ARCH_RISCV_FP_SINGLE
#elif XASH_RISCV_DOUBLEFP
#define XASH_ARCHITECTURE_ABI ARCHITECTURE_RISCV_FP_DOUBLE
#define XASH_ARCHITECTURE_ABI ARCH_RISCV_FP_DOUBLE
#else
#error
#endif