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https://github.com/GOSTSec/sgminer
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Add an avalon-auto option which enables dynamic overclocking based on hardware error rate for maximum effective hashrate.
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16
ASIC-README
16
ASIC-README
@ -84,15 +84,17 @@ degrees.
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Avalon commands:
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--avalon-auto Adjust avalon overclock frequency dynamically for best hashrate
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--avalon-cutoff <arg> Set avalon overheat cut off temperature (default: 60)
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--avalon-options <arg> Set avalon options baud:miners:asic:timeout:freq
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--avalon-temp <arg> Set avalon target temperature (default: 50)
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eg:
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--avalon-cutoff 65
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This will cut off the avalon should it get up to 65 degrees and will then
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re-enable it when it gets to the target temperature as specified by avalon-temp.
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Avalon auto will enable dynamic overclocking gradually increasing and
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decreasing the frequency till the highest hashrate that keeps hardware errors
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around 1% is achieved. This WILL run your avalon beyond its normal specification
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so the usual warnings apply. When avalon-auto is enabled, the avalon-options
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for frequency and timeout are used as the starting point only.
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eg:
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--avalon-temp 55
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@ -103,6 +105,12 @@ very low such as 0 will achieve this. This option can be added to the "More
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options" entry in the web interface if you do not have a direct way of setting
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it.
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eg:
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--avalon-cutoff 65
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This will cut off the avalon should it get up to 65 degrees and will then
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re-enable it when it gets to the target temperature as specified by avalon-temp.
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eg:
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--avalon-options 115200:24:10:45:282
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1
README
1
README
@ -233,6 +233,7 @@ See SCRYPT-README for more information regarding litecoin mining.
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ASIC and FPGA mining boards (BFL ASIC, BitForce, Icarus, ModMiner, Ztex)
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only options:
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--avalon-auto Adjust avalon overclock frequency dynamically for best hashrate
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--avalon-cutoff <arg> Set avalon overheat cut off temperature (default: 60)
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--avalon-options <arg> Set avalon options baud:miners:asic:timeout:freq
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--avalon-temp <arg> Set avalon target temperature (default: 50)
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@ -1057,6 +1057,9 @@ static struct opt_table opt_config_table[] = {
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opt_hidden),
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#endif
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#ifdef USE_AVALON
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OPT_WITHOUT_ARG("--avalon-auto",
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opt_set_bool, &opt_avalon_auto,
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"Adjust avalon overclock frequency dynamically for best hashrate"),
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OPT_WITH_ARG("--avalon-cutoff",
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set_int_0_to_100, opt_show_intval, &opt_avalon_overheat,
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"Set avalon overheat cut off temperature"),
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@ -42,6 +42,8 @@
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int opt_avalon_temp = AVALON_TEMP_TARGET;
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int opt_avalon_overheat = AVALON_TEMP_OVERHEAT;
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bool opt_avalon_auto;
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static int option_offset = -1;
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struct device_drv avalon_drv;
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@ -51,6 +53,7 @@ static int avalon_init_task(struct avalon_task *at,
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uint8_t miner_num, uint8_t nonce_elf,
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uint8_t gate_miner, int frequency)
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{
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uint16_t *lefreq16;
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uint8_t *buf;
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static bool first = true;
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@ -98,37 +101,8 @@ static int avalon_init_task(struct avalon_task *at,
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buf[9] = 0x01;
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buf[10] = 0x00;
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buf[11] = 0x00;
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switch (frequency) {
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case 256:
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buf[6] = 0x03;
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buf[7] = 0x08;
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break;
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default:
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case 270:
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buf[6] = 0x73;
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buf[7] = 0x08;
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break;
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case 282:
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buf[6] = 0xd3;
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buf[7] = 0x08;
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break;
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case 300:
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buf[6] = 0x63;
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buf[7] = 0x09;
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break;
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case 325:
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buf[6] = 0x28;
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buf[7] = 0x0a;
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break;
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case 350:
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buf[6] = 0xf0;
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buf[7] = 0x0a;
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break;
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case 375:
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buf[6] = 0xb8;
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buf[7] = 0x0b;
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break;
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}
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lefreq16 = (uint16_t *)&buf[6];
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*lefreq16 = htole16(frequency * 8);
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return 0;
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}
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@ -731,6 +705,11 @@ static void avalon_parse_results(struct cgpu_info *avalon, struct avalon_info *i
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mutex_lock(&info->lock);
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if (!info->nonces++)
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gettemp = true;
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info->auto_nonces++;
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mutex_unlock(&info->lock);
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} else if (opt_avalon_auto) {
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mutex_lock(&info->lock);
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info->auto_hw++;
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mutex_unlock(&info->lock);
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}
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@ -842,6 +821,31 @@ static void avalon_rotate_array(struct cgpu_info *avalon)
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avalon->work_array = 0;
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}
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static void avalon_set_timeout(struct avalon_info *info)
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{
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info->timeout = AVALON_TIMEOUT_FACTOR / info->frequency;
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}
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static void avalon_inc_freq(struct avalon_info *info)
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{
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info->frequency += 2;
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if (info->frequency > AVALON_MAX_FREQUENCY)
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info->frequency = AVALON_MAX_FREQUENCY;
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avalon_set_timeout(info);
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applog(LOG_NOTICE, "Avalon increasing frequency to %d, timeout %d",
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info->frequency, info->timeout);
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}
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static void avalon_dec_freq(struct avalon_info *info)
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{
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info->frequency -= 1;
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if (info->frequency < AVALON_MIN_FREQUENCY)
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info->frequency = AVALON_MIN_FREQUENCY;
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avalon_set_timeout(info);
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applog(LOG_NOTICE, "Avalon decreasing frequency to %d, timeout %d",
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info->frequency, info->timeout);
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}
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static void *avalon_send_tasks(void *userdata)
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{
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struct cgpu_info *avalon = (struct cgpu_info *)userdata;
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@ -860,6 +864,24 @@ static void *avalon_send_tasks(void *userdata)
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while (avalon_buffer_full(avalon))
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cgsem_wait(&info->write_sem);
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if (opt_avalon_auto && info->auto_queued >= AVALON_AUTO_CYCLE) {
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mutex_lock(&info->lock);
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if (info->auto_nonces >= (AVALON_AUTO_CYCLE * 19 / 20) &&
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info->auto_nonces <= (AVALON_AUTO_CYCLE * 21 / 20)) {
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int total = info->auto_nonces + info->auto_hw;
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/* Try to keep hw errors ~1-1.5% */
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if (info->auto_hw * 100 < total)
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avalon_inc_freq(info);
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else if (info->auto_hw * 66 > total)
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avalon_dec_freq(info);
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}
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info->auto_queued =
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info->auto_nonces =
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info->auto_hw = 0;
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mutex_unlock(&info->lock);
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}
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mutex_lock(&info->qlock);
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start_count = avalon->work_array * avalon_get_work_count;
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end_count = start_count + avalon_get_work_count;
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@ -877,11 +899,15 @@ static void *avalon_send_tasks(void *userdata)
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info->timeout, info->asic_count,
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info->miner_count, 1, 0, info->frequency);
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avalon_create_task(&at, avalon->works[i]);
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info->auto_queued++;
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} else {
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idled++;
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avalon_init_task(&at, 0, 0, info->fan_pwm,
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info->timeout, info->asic_count,
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info->miner_count, 1, 1, info->frequency);
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/* Reset the auto_queued count if we end up
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* idling any miners. */
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info->auto_queued = 0;
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}
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ret = avalon_send_task(&at, avalon);
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@ -25,15 +25,21 @@
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#define AVALON_FAN_FACTOR 120
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#define AVALON_DEFAULT_FAN_MAX_PWM 0xA0 /* 100% */
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#define AVALON_DEFAULT_FAN_MIN_PWM 0x20 /* 20% */
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#define AVALON_TEMP_TARGET 50
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#define AVALON_TEMP_HYSTERESIS 3
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#define AVALON_TEMP_OVERHEAT 60
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#define AVALON_DEFAULT_TIMEOUT 0x2D
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#define AVALON_MIN_FREQUENCY 256
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#define AVALON_MAX_FREQUENCY 450
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#define AVALON_TIMEOUT_FACTOR 12000
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#define AVALON_DEFAULT_FREQUENCY 282
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#define AVALON_DEFAULT_MINER_NUM 0x20
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#define AVALON_DEFAULT_ASIC_NUM 0xA
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#define AVALON_AUTO_CYCLE 1024
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#define AVALON_FTDI_READSIZE 510
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#define AVALON_USB_PACKETSIZE 512
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#define AVALON_READBUF_SIZE 8192
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@ -118,6 +124,10 @@ struct avalon_info {
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cgsem_t write_sem;
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int nonces;
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int auto_queued;
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int auto_nonces;
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int auto_hw;
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bool idle;
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bool reset;
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bool overheat;
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@ -142,6 +152,7 @@ ASSERT1(sizeof(uint32_t) == 4);
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extern struct avalon_info **avalon_info;
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extern int opt_avalon_temp;
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extern int opt_avalon_overheat;
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extern bool opt_avalon_auto;
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#endif /* USE_AVALON */
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#endif /* AVALON_H */
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