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https://github.com/GOSTSec/sgminer
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removed 8-component vector support from kernel, as this is not supported in CGMINER anyway
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782fc63c50
commit
e2b7c934f6
@ -3,9 +3,7 @@
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// Parts and / or ideas for this kernel are based upon the public-domain poclbm project, the phatk kernel by Phateus and the DiabloMiner kernel by DiabloD3.
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// Parts and / or ideas for this kernel are based upon the public-domain poclbm project, the phatk kernel by Phateus and the DiabloMiner kernel by DiabloD3.
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// The kernel was rewritten by me (Diapolo) and is still public-domain!
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// The kernel was rewritten by me (Diapolo) and is still public-domain!
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#ifdef VECTORS8
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#ifdef VECTORS4
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typedef uint8 u;
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#elif defined VECTORS4
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typedef uint4 u;
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typedef uint4 u;
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#elif defined VECTORS2
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#elif defined VECTORS2
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typedef uint2 u;
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typedef uint2 u;
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@ -53,9 +51,7 @@ __kernel
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u V[8];
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u V[8];
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u W[16];
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u W[16];
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#ifdef VECTORS8
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#ifdef VECTORS4
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const u nonce = (uint)(get_local_id(0)) * 8U + (uint)(get_group_id(0)) * (uint)(WORKVEC) + base;
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#elif defined VECTORS4
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const u nonce = (uint)(get_local_id(0)) * 4U + (uint)(get_group_id(0)) * (uint)(WORKVEC) + base;
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const u nonce = (uint)(get_local_id(0)) * 4U + (uint)(get_group_id(0)) * (uint)(WORKVEC) + base;
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#elif defined VECTORS2
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#elif defined VECTORS2
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const u nonce = (uint)(get_local_id(0)) * 2U + (uint)(get_group_id(0)) * (uint)(WORKVEC) + base;
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const u nonce = (uint)(get_local_id(0)) * 2U + (uint)(get_group_id(0)) * (uint)(WORKVEC) + base;
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@ -116,9 +112,7 @@ __kernel
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//----------------------------------------------------------------------------------
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//----------------------------------------------------------------------------------
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#ifdef VECTORS8
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#ifdef VECTORS4
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W[0] = PreW18 + (u)(rotr25(nonce.s0), rotr25(nonce.s0) ^ 0x2004000U, rotr25(nonce.s0) ^ 0x4008000U, rotr25(nonce.s0) ^ 0x600c000U, rotr25(nonce.s0) ^ 0x8010000U, rotr25(nonce.s0) ^ 0xa014000U, rotr25(nonce.s0) ^ 0xc018000U, rotr25(nonce.s0) ^ 0xe01c000U);
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#elif defined VECTORS4
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W[0] = PreW18 + (u)(rotr25(nonce.x), rotr25(nonce.x) ^ 0x2004000U, rotr25(nonce.x) ^ 0x4008000U, rotr25(nonce.x) ^ 0x600c000U);
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W[0] = PreW18 + (u)(rotr25(nonce.x), rotr25(nonce.x) ^ 0x2004000U, rotr25(nonce.x) ^ 0x4008000U, rotr25(nonce.x) ^ 0x600c000U);
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#elif defined VECTORS2
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#elif defined VECTORS2
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W[0] = PreW18 + (u)(rotr25(nonce.x), rotr25(nonce.x) ^ 0x2004000U);
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W[0] = PreW18 + (u)(rotr25(nonce.x), rotr25(nonce.x) ^ 0x2004000U);
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@ -574,30 +568,7 @@ __kernel
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#define FOUND (0x80)
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#define FOUND (0x80)
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#define NFLAG (0x7F)
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#define NFLAG (0x7F)
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#ifdef VECTORS8
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#ifdef VECTORS4
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V[7] ^= 0x136032edU;
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bool result = V[7].s0 & V[7].s1 & V[7].s2 & V[7].s3 & V[7].s4 & V[7].s5 & V[7].s6 & V[7].s7;
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if (!result) {
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if (!V[7].s0)
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output[FOUND] = output[NFLAG & nonce.s0] = nonce.s0;
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if (!V[7].s1)
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output[FOUND] = output[NFLAG & nonce.s1] = nonce.s1;
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if (!V[7].s2)
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output[FOUND] = output[NFLAG & nonce.s2] = nonce.s2;
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if (!V[7].s3)
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output[FOUND] = output[NFLAG & nonce.s3] = nonce.s3;
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if (!V[7].s4)
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output[FOUND] = output[NFLAG & nonce.s4] = nonce.s4;
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if (!V[7].s5)
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output[FOUND] = output[NFLAG & nonce.s5] = nonce.s5;
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if (!V[7].s6)
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output[FOUND] = output[NFLAG & nonce.s6] = nonce.s6;
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if (!V[7].s7)
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output[FOUND] = output[NFLAG & nonce.s7] = nonce.s7;
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}
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#elif defined VECTORS4
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if ((V[7].x == 0x136032edU) ^ (V[7].y == 0x136032edU) ^ (V[7].z == 0x136032edU) ^ (V[7].w == 0x136032edU))
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if ((V[7].x == 0x136032edU) ^ (V[7].y == 0x136032edU) ^ (V[7].z == 0x136032edU) ^ (V[7].w == 0x136032edU))
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output[FOUND] = output[NFLAG & nonce.x] = (V[7].x == 0x136032edU) ? nonce.x : ((V[7].y == 0x136032edU) ? nonce.y : ((V[7].z == 0x136032edU) ? nonce.z : nonce.w));
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output[FOUND] = output[NFLAG & nonce.x] = (V[7].x == 0x136032edU) ? nonce.x : ((V[7].y == 0x136032edU) ? nonce.y : ((V[7].z == 0x136032edU) ? nonce.z : nonce.w));
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#elif defined VECTORS2
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#elif defined VECTORS2
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