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@ -14,213 +14,9 @@
@@ -14,213 +14,9 @@
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#ifdef USE_HASHFAST |
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#include "miner.h" |
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#include "elist.h" |
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#include "hf_protocol.h" |
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#define HASHFAST_MINER_THREADS 1 |
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// Some serial protocol definitions
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#define DEFAULT_BAUD_RATE 115200 |
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#define HF_PREAMBLE (uint8_t) 0xaa |
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#define HF_BROADCAST_ADDRESS (uint8_t) 0xff |
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// Operation codes (Second header byte)
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#define OP_NULL 0 |
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#define OP_ROOT 1 |
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#define OP_RESET 2 |
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#define OP_PLL_CONFIG 3 |
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#define OP_ADDRESS 4 |
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#define OP_READDRESS 5 |
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#define OP_HIGHEST 6 |
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#define OP_BAUD 7 |
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#define OP_UNROOT 8 |
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#define OP_HASH 9 |
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#define OP_NONCE 10 |
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#define OP_ABORT 11 |
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#define OP_STATUS 12 |
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#define OP_GPIO 13 |
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#define OP_CONFIG 14 |
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#define OP_STATISTICS 15 |
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#define OP_GROUP 16 |
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#define OP_CLOCKGATE 17 |
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// All packets begin with a standard 8 byte header
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struct hf_header { |
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uint8_t preamble; // Always 0xaa
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uint8_t operation_code; |
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uint8_t chip_address; |
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uint8_t core_address; |
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uint16_t hdata; // Header specific data
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uint8_t data_length; // .. of data frame to follow, in 4 byte blocks, 0=no data
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uint8_t crc8; // Computed across bytes 1-6 inclusive
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} __attribute__((packed,aligned(4))); // 8 bytes total
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// Body of packet for an OP_HASH operation
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struct hf_hash { |
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uint8_t midstate[32]; // Computed from first half of block header
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uint8_t merkle_residual[4]; // From block header
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uint32_t timestamp; // From block header
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uint32_t bits; // Actual difficulty target for block header
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uint32_t starting_nonce; // Usually set to 0
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uint32_t nonce_loops; // How many nonces to search, or 0 for 2^32
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uint16_t ntime_loops:12; // How many times to roll timestamp, or 0
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uint16_t spare1:4; |
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uint8_t search_difficulty; // Search difficulty to use, number of leading '0' bits required
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uint8_t spare2; |
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uint32_t spare3; |
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uint32_t crc32; // Computed across all preceding data fields
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} __attribute__((packed,aligned(4))); // 64 bytes total, including CRC
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// How nonces are returned in OP_NONCE packets
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struct hf_candidate_nonce { |
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uint32_t nonce; // Candidate nonce
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uint16_t sequence; // Sequence number from corresponding OP_HASH
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uint16_t ntime:12; // ntime offset, if ntime roll occurred
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uint16_t search:1; // Search forward next 128 nonces to find solution
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uint16_t spare:3; |
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} __attribute__((packed,aligned(4))); |
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// Body of packet for an OP_CONFIG operation
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struct hf_config_data { |
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uint16_t status_period:11; // Periodic status time, msec
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uint16_t enable_periodic_status:1; // Send periodic status
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uint16_t send_status_on_core_idle:1; // Schedule status whenever core goes idle
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uint16_t send_status_on_pending_empty:1; // Schedule status whenever core pending goes idle
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uint16_t pwm_active_level:1; // Active level of PWM outputs, if used
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uint16_t forward_all_privileged_packets:1; // Forward priv pkts -- diagnostic
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uint8_t status_batch_delay; // Batching delay, time to wait before actually sending status
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uint8_t watchdog:7; // Watchdog timeout, seconds
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uint8_t disable_sensors:1; // Diagnostic
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uint8_t rx_header_timeout:7; // Header timeout in char times
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uint8_t rx_ignore_header_crc:1; // Ignore rx header crc's (diagnostic)
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uint8_t rx_data_timeout:7; // Data timeout in char times / 16
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uint8_t rx_ignore_data_crc:1; // Ignore rx data crc's (diagnostic)
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uint8_t stats_interval:7; // Minimum interval to report statistics (seconds)
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uint8_t stat_diagnostic:1; // Never set this
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uint8_t measure_interval; // Die temperature measurment interval (msec)
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uint32_t one_usec:12; // How many LF clocks per usec.
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uint32_t max_nonces_per_frame:4; // Maximum # of nonces to combine in a single frame
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uint32_t voltage_sample_points:8; // Bit mask for sample points (up to 5 bits set)
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uint32_t pwm_phases:2; // phases - 1
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uint32_t trim:4; // Trim value for temperature measurements
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uint32_t clock_diagnostic:1; // Never set this
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uint32_t forward_all_packets:1; // Forward everything - diagnostic.
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uint16_t pwm_period; // Period of PWM outputs, in reference clock cycles
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uint16_t pwm_pulse_period; // Initial count, phase 0
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} __attribute__((packed,aligned(4))); |
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// What comes back in the body of an OP_STATISTICS frame
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struct hf_statistics { |
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uint8_t rx_header_crc; // Header CRC's
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uint8_t rx_body_crc; // Data CRC's
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uint8_t rx_header_timeouts; // Header timeouts
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uint8_t rx_body_timeouts; // Data timeouts
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uint8_t core_nonce_fifo_full; // Core nonce Q overrun events
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uint8_t array_nonce_fifo_full; // System nonce Q overrun events
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uint8_t stats_overrun; // Overrun in statistics reporting
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uint8_t spare; |
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} __attribute__((packed,aligned(4))); |
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// Not really necessary (could just link directly to CGMiner's work structures), but these are
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// here as an internal place to stage split jobs in the future, e.g. ntime rolling across
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// multiple cores.
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typedef struct hf_work_t { |
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struct work *work; // Finally out to cgminer's work
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uint8_t data[128]; // XXX These are only replicated here to help de-couple the
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uint8_t midstate[32]; // XXX driver code from cgminer's specifics, since this is
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uint8_t target[32]; // XXX a sample driver. There's no other reason.
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int split_count; // How many cores this is split between
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} hf_work_t; |
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// Internal representation of a "job". Each core should normally have one active job and one pending job queued to it.
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// This is where the ALL IMPORTANT sequence number is kept. When jobs are created, this structure is put in the "active"
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// list (unique to the asic/core), and an incrementing sequence number is assigned to the job. Only when a sequence number
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// that matches or exceeds (modulo <max sequence>) this number in a returned OP_STATUS, do we know that the "busy" bits
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// associated with this same core represent the job status, i.e. the associated OP_HASH is no longer in flight.
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typedef struct hf_job_t { |
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struct list_head l; |
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uint8_t chip; // Chip address
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uint8_t core; // Core address
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uint16_t sequence; // Copy of the active sequence number
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hf_work_t *work; // Pointer to the work block
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} hf_job_t; |
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// Per-core structure
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typedef struct hf_core_t { |
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hf_job_t *active; // Active job on this core, NULL if none
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hf_job_t *pending; // Pending job on this core, NULL if none
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uint8_t enabled; // 1 = enabled, 0 = disabled
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uint8_t inflight; // How many jobs are "inflight": 0, 1 or 2
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uint8_t seen_allbusy; // We've seen both active and pending queues busy
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} hf_core_t; // since the last OP_HASH was queued
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// Per device structure. This is found by looking up an array, which is indexed
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// by CGMiner's cgpu_info.device_id field.
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typedef struct hf_info_t { |
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int miner_count; |
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int timeout; |
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int baud_rate; // Baud rate, if applicable
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int ref_frequency; // Reference clock rate
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int asic_count; // # of chips in the chain
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int core_count; // # of cores per chip
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int device_type; // What sort of device this is
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int max_search_difficulty; // # of bits set to 0 in hash
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int inflight_target; // Set to chips * cores * 2 (1 active, 1 pending each core)
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int hash_sequence; // The last hash sequence #
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int num_sequence; // A power of 2. What the sequence number range is.
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int num_work; // Number of "work" entries in work queue
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int max_work; // Target maximum number of "work" entries in work queue
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// If work is split between cores, then max_work < inflight_target.
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int last_log; // Last OP_STATUS log time in seconds
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float thermal_trip_temperature; // Thermal trip temperature in degrees C
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int thermal_trip_limit; // Thermal trip limit in raw device adc counts (derived from above)
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int tacho_enable; // Set if there is a tacho to be read
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uint64_t hash_loops; // XXX Temp. How many nonces to cycle through (range limited for FPGA emulation)
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int no_matching_work; |
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struct list_head active; // Double linked list through all ACTIVE in-flight jobs (hf_job_t's)
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struct list_head inactive; // Double linked list through all INACTIVE job blocks (hf_job_t's)
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int active_count; // How many active hf_job_t's are out there
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int inactive_count; // How many inactive hf_job_t's are out there
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hf_core_t **cores; // Points to array of chips, which each point to array of cores
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hf_work_t *work; // Points to array of work
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} hf_info_t; |
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// The sequence distance between a sent and received sequence number.
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#define SEQUENCE_DISTANCE(tx,rx) ((tx)>=(rx)?((tx)-(rx)):(info->num_sequence+(tx)-(rx))) |
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// Values info->device_type can take, comes from a completed OP_ADDRESS cycle
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#define HFD_G1 1 /* A real G-1 ASIC */ |
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#define HFD_VC709 128 /* FPGA Emulation */ |
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#define HFD_ExpressAGX 129 /* FPGA Emulation */ |
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// Some USB defines
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#define HASHFAST_USB_PACKETSIZE 512 /* XXX Fix this. */ |
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// Some low level serial defines
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#define HASHFAST_READ_TIME(baud) ((double)HASHFAST_READ_SIZE * (double)8.0 / (double)(baud)) |
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#define ASSERT1(condition) __maybe_unused static char sizeof_uint32_t_must_be_4[(condition)?1:-1] |
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ASSERT1(sizeof(uint32_t) == 4); |
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hf_info_t **hashfast_info; |
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void hf_init_crc8(void); |
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void hf_init_crc32(void); |
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#define HASHFAST_MINER_THREADS 1 |
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#endif /* USE_HASHFAST */ |
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#endif /* HASHFAST_H */ |
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Con Kolivas
11 years ago