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Merge pull request #496 from xiangfu/master
avalon: display the FPGA controller version on API
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commit
d5f61e9a5d
@ -273,6 +273,7 @@ static int avalon_reset(struct cgpu_info *avalon, bool initial)
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struct avalon_task at;
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struct avalon_task at;
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uint8_t *buf, *tmp;
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uint8_t *buf, *tmp;
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struct timespec p;
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struct timespec p;
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struct avalon_info *info = avalon->device_data;
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/* Send reset, then check for result */
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/* Send reset, then check for result */
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avalon_init_task(&at, 1, 0,
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avalon_init_task(&at, 1, 0,
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@ -329,9 +330,17 @@ static int avalon_reset(struct cgpu_info *avalon, bool initial)
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" (%d: %02x %02x %02x %02x)", avalon->drv->name, avalon->device_id,
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" (%d: %02x %02x %02x %02x)", avalon->drv->name, avalon->device_id,
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i, buf[0], buf[1], buf[2], buf[3]);
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i, buf[0], buf[1], buf[2], buf[3]);
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/* FIXME: return 1; */
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/* FIXME: return 1; */
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} else
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} else {
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applog(LOG_WARNING, "%s%d: Reset succeeded",
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/* buf[44]: minor
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avalon->drv->name, avalon->device_id);
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* buf[45]: day
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* buf[46]: year,month, d6: 201306
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*/
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info->ctlr_ver = ((buf[46] >> 4) + 2000) * 1000000 +
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(buf[46] & 0x0f) * 10000 +
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buf[45] * 100 + buf[44];
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applog(LOG_WARNING, "%s%d: Reset succeeded (Controller version: %d)",
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avalon->drv->name, avalon->device_id, info->ctlr_ver);
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}
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return 0;
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return 0;
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}
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}
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@ -1522,6 +1531,7 @@ static struct api_data *avalon_api_stats(struct cgpu_info *cgpu)
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info->version1, info->version2, info->version3);
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info->version1, info->version2, info->version3);
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root = api_add_string(root, "version", buf, true);
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root = api_add_string(root, "version", buf, true);
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}
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}
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root = api_add_int(root, "Controller Version", &(info->ctlr_ver), false);
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return root;
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return root;
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}
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}
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@ -125,6 +125,7 @@ struct avalon_info {
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int matching_work[AVALON_DEFAULT_MINER_NUM];
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int matching_work[AVALON_DEFAULT_MINER_NUM];
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int frequency;
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int frequency;
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uint32_t ctlr_ver;
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struct thr_info *thr;
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struct thr_info *thr;
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pthread_t read_thr;
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pthread_t read_thr;
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