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libztex: Read bitstream file in 64kb blocks with simpler and faster code

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This commit is contained in:
Denis Ahrens 2012-12-03 08:53:22 +01:00
parent a5b2845096
commit b70edef9f5
1 changed files with 15 additions and 43 deletions
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58
libztex.c
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@ -276,8 +276,7 @@ static int libztex_configureFpgaHS(struct libztex_device *ztex, const char* firm
struct libztex_fpgastate state; struct libztex_fpgastate state;
const int transactionBytes = 65536; const int transactionBytes = 65536;
unsigned char buf[transactionBytes], settings[2]; unsigned char buf[transactionBytes], settings[2];
int tries, cnt, buf_p, i; int tries, cnt, err, i;
ssize_t pos = 0;
FILE *fp; FILE *fp;
if (!libztex_checkCapability(ztex, CAPABILITY_HS_FPGA)) if (!libztex_checkCapability(ztex, CAPABILITY_HS_FPGA))
@ -302,52 +301,25 @@ static int libztex_configureFpgaHS(struct libztex_device *ztex, const char* firm
return -2; return -2;
} }
while (pos < transactionBytes && !feof(fp)) {
buf[pos++] = getc(fp);
}
if (feof(fp))
pos--;
if (bs != 0 && bs != 1)
bs = libztex_detectBitstreamBitOrder(buf, transactionBytes < pos? transactionBytes: pos);
if (bs == 1)
libztex_swapBits(buf, pos);
libusb_control_transfer(ztex->hndl, 0x40, 0x34, 0, 0, NULL, 0, 1000); libusb_control_transfer(ztex->hndl, 0x40, 0x34, 0, 0, NULL, 0, 1000);
// 0x34 - initHSFPGAConfiguration // 0x34 - initHSFPGAConfiguration
buf_p = pos; do
while (1) { {
i = 0; int length = fread(buf,1,transactionBytes,fp);
while (i < buf_p) {
if (libusb_bulk_transfer(ztex->hndl, if (bs != 0 && bs != 1)
settings[0], bs = libztex_detectBitstreamBitOrder(buf, length);
&buf[i],
buf_p - i,
&cnt, 1000) != 0) {
applog(LOG_ERR, "%s: Failed send hs fpga data", ztex->repr);
break;
}
usleep(500);
i += cnt;
}
if (i < buf_p || buf_p < transactionBytes)
break;
buf_p = 0;
while (buf_p < transactionBytes && !feof(fp)) {
buf[buf_p++] = getc(fp);
}
if (feof(fp))
buf_p--;
pos += buf_p;
if (buf_p == 0)
break;
if (bs == 1) if (bs == 1)
libztex_swapBits(buf, buf_p); libztex_swapBits(buf, length);
err = libusb_bulk_transfer(ztex->hndl, settings[0], buf, length, &cnt, 1000);
if (cnt != length)
applog(LOG_ERR, "%s: cnt != length", ztex->repr);
if (err != 0)
applog(LOG_ERR, "%s: Failed send hs fpga data", ztex->repr);
} }
while (!feof(fp));
libusb_control_transfer(ztex->hndl, 0x40, 0x35, 0, 0, NULL, 0, 1000); libusb_control_transfer(ztex->hndl, 0x40, 0x35, 0, 0, NULL, 0, 1000);
// 0x35 - finishHSFPGAConfiguration // 0x35 - finishHSFPGAConfiguration