mirror of
https://github.com/GOSTSec/sgminer
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Merge pull request #196 from nelisky/ztex-120417
Adding ZTEX 1.15y quad fpga board support
This commit is contained in:
Con Kolivas
commit
a8d50a3cb8
@ -30,17 +30,37 @@
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#define GOLDEN_BACKLOG 5
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struct device_api ztex_api, ztex_hotplug_api;
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struct device_api ztex_api;
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// Forward declarations
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static void ztex_disable(struct thr_info* thr);
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static bool ztex_prepare(struct thr_info *thr);
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static void ztex_selectFpga(struct libztex_device* ztex)
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{
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if (ztex->root->numberOfFpgas > 1) {
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if (ztex->root->selectedFpga != ztex->fpgaNum)
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mutex_lock(&ztex->root->mutex);
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libztex_selectFpga(ztex);
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}
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}
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static void ztex_releaseFpga(struct libztex_device* ztex)
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{
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if (ztex->root->numberOfFpgas > 1) {
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ztex->root->selectedFpga = -1;
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mutex_unlock(&ztex->root->mutex);
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}
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}
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static void ztex_detect(void)
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{
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int cnt;
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int i;
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int i,j;
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int fpgacount;
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struct libztex_dev_list **ztex_devices;
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struct libztex_device *ztex_slave;
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struct cgpu_info *ztex;
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cnt = libztex_scanDevices(&ztex_devices);
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applog(LOG_WARNING, "Found %d ztex board(s)", cnt);
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@ -48,14 +68,33 @@ static void ztex_detect(void)
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for (i = 0; i < cnt; i++) {
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if (total_devices == MAX_DEVICES)
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break;
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struct cgpu_info *ztex;
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ztex = calloc(1, sizeof(struct cgpu_info));
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ztex->api = &ztex_api;
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ztex->device_ztex = ztex_devices[i]->dev;
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ztex->threads = 1;
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ztex->device_ztex->fpgaNum = 0;
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ztex->device_ztex->root = ztex->device_ztex;
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add_cgpu(ztex);
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applog(LOG_WARNING,"%s: Found Ztex, mark as %d", ztex->device_ztex->repr, ztex->device_id);
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fpgacount = libztex_numberOfFpgas(ztex->device_ztex);
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if (fpgacount > 1)
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pthread_mutex_init(&ztex->device_ztex->mutex, NULL);
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for (j = 1; j < fpgacount; j++) {
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ztex = calloc(1, sizeof(struct cgpu_info));
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ztex->api = &ztex_api;
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ztex_slave = calloc(1, sizeof(struct libztex_device));
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memcpy(ztex_slave, ztex_devices[i]->dev, sizeof(struct libztex_device));
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ztex->device_ztex = ztex_slave;
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ztex->threads = 1;
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ztex_slave->fpgaNum = j;
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ztex_slave->root = ztex_devices[i]->dev;
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ztex_slave->repr[strlen(ztex_slave->repr) - 1] = ('1' + j);
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add_cgpu(ztex);
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}
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applog(LOG_WARNING,"%s: Found Ztex (fpga count = %d) , mark as %d", ztex->device_ztex->repr, fpgacount, ztex->device_id);
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}
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if (cnt > 0)
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@ -88,16 +127,18 @@ static bool ztex_updateFreq(struct libztex_device* ztex)
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}
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if (bestM != ztex->freqM) {
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libztex_selectFpga(ztex, 0);
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ztex_selectFpga(ztex);
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libztex_setFreq(ztex, bestM);
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ztex_releaseFpga(ztex);
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}
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maxM = ztex->freqMDefault;
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while (maxM < ztex->freqMaxM && ztex->errorWeight[maxM + 1] > 100)
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maxM++;
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if ((bestM < (1.0 - LIBZTEX_OVERHEATTHRESHOLD) * maxM) && bestM < maxM - 1) {
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libztex_selectFpga(ztex, 0);
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ztex_selectFpga(ztex);
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libztex_resetFpga(ztex);
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ztex_releaseFpga(ztex);
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applog(LOG_ERR, "%s: frequency drop of %.1f%% detect. This may be caused by overheating. FPGA is shut down to prevent damage.",
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ztex->repr, (1.0 - 1.0 * bestM / maxM) * 100);
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return false;
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@ -163,7 +204,7 @@ static uint64_t ztex_scanhash(struct thr_info *thr, struct work *work,
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memcpy(sendbuf, work->data + 64, 12);
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memcpy(sendbuf + 12, work->midstate, 32);
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libztex_selectFpga(ztex, 0);
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ztex_selectFpga(ztex);
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i = libztex_sendHashData(ztex, sendbuf);
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if (i < 0) {
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// Something wrong happened in send
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@ -174,9 +215,11 @@ static uint64_t ztex_scanhash(struct thr_info *thr, struct work *work,
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// And there's nothing we can do about it
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ztex_disable(thr);
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applog(LOG_ERR, "%s: Failed to send hash data with err %d, giving up", ztex->repr, i);
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ztex_releaseFpga(ztex);
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return 0;
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}
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}
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ztex_releaseFpga(ztex);
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applog(LOG_DEBUG, "%s: sent hashdata", ztex->repr);
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@ -204,7 +247,7 @@ static uint64_t ztex_scanhash(struct thr_info *thr, struct work *work,
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applog(LOG_DEBUG, "%s: New work detected", ztex->repr);
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break;
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}
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libztex_selectFpga(ztex, 0);
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ztex_selectFpga(ztex);
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i = libztex_readHashData(ztex, &hdata[0]);
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if (i < 0) {
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// Something wrong happened in read
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@ -217,9 +260,11 @@ static uint64_t ztex_scanhash(struct thr_info *thr, struct work *work,
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applog(LOG_ERR, "%s: Failed to read hash data with err %d, giving up", ztex->repr, i);
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free(lastnonce);
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free(backlog);
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ztex_releaseFpga(ztex);
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return 0;
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}
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}
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ztex_releaseFpga(ztex);
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if (work_restart[thr->id].restart) {
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applog(LOG_DEBUG, "%s: New work detected", ztex->repr);
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@ -302,7 +347,7 @@ static uint64_t ztex_scanhash(struct thr_info *thr, struct work *work,
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static void ztex_statline_before(char *buf, struct cgpu_info *cgpu)
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{
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if (cgpu->deven == DEV_ENABLED) {
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tailsprintf(buf, "%s | ", cgpu->device_ztex->snString);
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tailsprintf(buf, "%s-%d | ", cgpu->device_ztex->snString, cgpu->device_ztex->fpgaNum+1);
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tailsprintf(buf, "%0.2fMhz | ", cgpu->device_ztex->freqM1 * (cgpu->device_ztex->freqM + 1));
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}
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}
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@ -310,24 +355,28 @@ static void ztex_statline_before(char *buf, struct cgpu_info *cgpu)
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static bool ztex_prepare(struct thr_info *thr)
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{
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struct timeval now;
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struct cgpu_info *ztex = thr->cgpu;
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struct cgpu_info *cgpu = thr->cgpu;
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struct libztex_device *ztex = cgpu->device_ztex;
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gettimeofday(&now, NULL);
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get_datestamp(ztex->init, &now);
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if (libztex_configureFpga(ztex->device_ztex) != 0)
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get_datestamp(cgpu->init, &now);
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ztex_selectFpga(ztex);
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if (libztex_configureFpga(ztex) != 0)
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return false;
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ztex->device_ztex->freqM = -1;
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ztex_updateFreq(ztex->device_ztex);
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applog(LOG_DEBUG, "%s: prepare", ztex->device_ztex->repr);
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ztex_releaseFpga(ztex);
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ztex->freqM = ztex->freqMaxM+1;;
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//ztex_updateFreq(ztex);
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libztex_setFreq(ztex, ztex->freqMDefault);
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applog(LOG_DEBUG, "%s: prepare", ztex->repr);
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return true;
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}
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static void ztex_shutdown(struct thr_info *thr)
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{
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if (thr->cgpu->device_ztex != NULL) {
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if (thr->cgpu->device_ztex->fpgaNum == 0)
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pthread_mutex_destroy(&thr->cgpu->device_ztex->mutex);
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applog(LOG_DEBUG, "%s: shutdown", thr->cgpu->device_ztex->repr);
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libztex_destroy_device(thr->cgpu->device_ztex);
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thr->cgpu->device_ztex = NULL;
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@ -350,3 +399,4 @@ struct device_api ztex_api = {
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.scanhash = ztex_scanhash,
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.thread_shutdown = ztex_shutdown,
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};
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133
libztex.c
133
libztex.c
@ -125,6 +125,107 @@ static int libztex_getFpgaState(struct libztex_device *ztex, struct libztex_fpga
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return 0;
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}
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static int libztex_configureFpgaHS(struct libztex_device *ztex, const char* firmware, bool force, char bs)
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{
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struct libztex_fpgastate state;
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const int transactionBytes = 65536;
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unsigned char buf[transactionBytes], settings[2];
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int tries, cnt, buf_p, i;
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ssize_t pos = 0;
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FILE *fp;
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if (!libztex_checkCapability(ztex, CAPABILITY_HS_FPGA))
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return -1;
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libztex_getFpgaState(ztex, &state);
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if (!force && state.fpgaConfigured) {
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applog(LOG_INFO, "Bitstream already configured");
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return 1;
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}
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cnt = libusb_control_transfer(ztex->hndl, 0xc0, 0x33, 0, 0, settings, 2, 1000);
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if (unlikely(cnt < 0)) {
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applog(LOG_ERR, "%s: Failed getHSFpgaSettings with err %d", ztex->repr, cnt);
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return cnt;
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}
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libusb_claim_interface(ztex->hndl, settings[1]);
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for (tries = 3; tries > 0; tries--) {
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fp = fopen(firmware, "rb");
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if (!fp) {
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applog(LOG_ERR, "%s: failed to read firmware '%s'", ztex->repr, firmware);
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return -2;
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}
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while (pos < transactionBytes && !feof(fp)) {
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buf[pos++] = getc(fp);
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}
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if (feof(fp))
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pos--;
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if (bs != 0 && bs != 1)
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bs = libztex_detectBitstreamBitOrder(buf, transactionBytes < pos? transactionBytes: pos);
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if (bs == 1)
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libztex_swapBits(buf, pos);
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libusb_control_transfer(ztex->hndl, 0x40, 0x34, 0, 0, NULL, 0, 1000);
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// 0x34 - initHSFPGAConfiguration
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buf_p = pos;
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while (1) {
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i = 0;
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while (i < buf_p) {
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if (libusb_bulk_transfer(ztex->hndl,
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settings[0],
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&buf[i],
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buf_p - i,
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&cnt, 1000) != 0) {
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applog(LOG_ERR, "%s: Failed send hs fpga data", ztex->repr);
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break;
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}
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usleep(500);
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i += cnt;
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}
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if (i < buf_p || buf_p < transactionBytes)
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break;
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buf_p = 0;
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while (buf_p < transactionBytes && !feof(fp)) {
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buf[buf_p++] = getc(fp);
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}
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if (feof(fp))
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buf_p--;
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pos += buf_p;
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if (buf_p == 0)
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break;
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if (bs == 1)
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libztex_swapBits(buf, buf_p);
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}
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libusb_control_transfer(ztex->hndl, 0x40, 0x35, 0, 0, NULL, 0, 1000);
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// 0x35 - finishHSFPGAConfiguration
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if (cnt >= 0)
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tries = 0;
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fclose(fp);
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libztex_getFpgaState(ztex, &state);
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if (!state.fpgaConfigured) {
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applog(LOG_ERR, "%s: HS FPGA configuration failed: DONE pin does not go high", ztex->repr);
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return -3;
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}
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}
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libusb_release_interface(ztex->hndl, settings[1]);
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usleep(200000);
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applog(LOG_INFO, "%s: HS FPGA configuration done", ztex->repr);
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return 0;
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}
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static int libztex_configureFpgaLS(struct libztex_device *ztex, const char* firmware, bool force, char bs)
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{
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struct libztex_fpgastate state;
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@ -216,12 +317,15 @@ static int libztex_configureFpgaLS(struct libztex_device *ztex, const char* firm
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int libztex_configureFpga(struct libztex_device *ztex)
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{
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char buf[256] = "bitstreams/";
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int rv;
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memset(&buf[11], 0, 245);
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strcpy(&buf[11], ztex->bitFileName);
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strcpy(&buf[strlen(buf)], ".bit");
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return libztex_configureFpgaLS(ztex, buf, true, 2);
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rv = libztex_configureFpgaHS(ztex, buf, true, 2);
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if (rv != 0)
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rv = libztex_configureFpgaLS(ztex, buf, true, 2);
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return rv;
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}
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int libztex_numberOfFpgas(struct libztex_device *ztex) {
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@ -235,30 +339,31 @@ int libztex_numberOfFpgas(struct libztex_device *ztex) {
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return cnt;
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}
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ztex->numberOfFpgas = buf[0] + 1;
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ztex->selectedFpga = buf[1];
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ztex->selectedFpga = -1;//buf[1];
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ztex->parallelConfigSupport = (buf[2] == 1);
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} else {
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ztex->numberOfFpgas = 1;
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ztex->selectedFpga = 0;
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ztex->selectedFpga = -1;//0;
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ztex->parallelConfigSupport = false;
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}
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}
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return ztex->numberOfFpgas;
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}
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int libztex_selectFpga(struct libztex_device *ztex, int number) {
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int cnt, fpgacnt = libztex_numberOfFpgas(ztex);
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int libztex_selectFpga(struct libztex_device *ztex) {
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int cnt, fpgacnt = libztex_numberOfFpgas(ztex->root);
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int number = ztex->fpgaNum;
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if (number < 0 || number >= fpgacnt) {
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applog(LOG_WARNING, "%s: Trying to select wrong fpga (%d in %d)", ztex->repr, number, fpgacnt);
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return 1;
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}
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if (ztex->selectedFpga != number && libztex_checkCapability(ztex, CAPABILITY_MULTI_FPGA)) {
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cnt = libusb_control_transfer(ztex->hndl, 0x40, 0x51, number, 0, NULL, 0, 500);
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if (ztex->root->selectedFpga != number && libztex_checkCapability(ztex->root, CAPABILITY_MULTI_FPGA)) {
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cnt = libusb_control_transfer(ztex->root->hndl, 0x40, 0x51, number, 0, NULL, 0, 500);
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if (unlikely(cnt < 0)) {
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applog(LOG_ERR, "Ztex check device: Failed to set fpga with err %d", cnt);
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return cnt;
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}
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ztex->selectedFpga = number;
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ztex->root->selectedFpga = number;
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}
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return 0;
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}
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@ -276,8 +381,12 @@ int libztex_setFreq(struct libztex_device *ztex, uint16_t freq) {
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return cnt;
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}
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ztex->freqM = freq;
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applog(LOG_WARNING, "%s: Frequency change from %0.2f to %0.2f Mhz",
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ztex->repr, ztex->freqM1 * (oldfreq + 1), ztex->freqM1 * (ztex->freqM + 1));
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if (oldfreq > ztex->freqMaxM)
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applog(LOG_WARNING, "%s: Frequency set to %0.2f Mhz",
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ztex->repr, ztex->freqM1 * (ztex->freqM + 1));
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else
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applog(LOG_WARNING, "%s: Frequency change from %0.2f to %0.2f Mhz",
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ztex->repr, ztex->freqM1 * (oldfreq + 1), ztex->freqM1 * (ztex->freqM + 1));
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return 0;
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}
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@ -426,7 +535,7 @@ int libztex_prepare_device(struct libusb_device *dev, struct libztex_device** zt
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newdev->usbbus = libusb_get_bus_number(dev);
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newdev->usbaddress = libusb_get_device_address(dev);
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sprintf(newdev->repr, "ZTEX %.3d:%.3d-%s", newdev->usbbus, newdev->usbaddress, newdev->snString);
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sprintf(newdev->repr, "ZTEX %s-1", newdev->snString);
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newdev->valid = true;
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return 0;
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}
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@ -44,6 +44,9 @@ struct libztex_fpgastate {
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};
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struct libztex_device {
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pthread_mutex_t mutex;
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struct libztex_device *root;
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int fpgaNum;
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bool valid;
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struct libusb_device_descriptor descriptor;
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libusb_device_handle *hndl;
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@ -75,7 +78,7 @@ struct libztex_device {
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int selectedFpga;
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bool parallelConfigSupport;
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char repr[64];
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char repr[20];
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};
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struct libztex_dev_list {
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@ -98,6 +101,7 @@ extern int libztex_setFreq (struct libztex_device *ztex, uint16_t freq);
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extern int libztex_sendHashData (struct libztex_device *ztex, unsigned char *sendbuf);
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extern int libztex_readHashData (struct libztex_device *ztex, struct libztex_hash_data nonces[]);
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extern int libztex_resetFpga (struct libztex_device *ztex);
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extern int libztex_selectFpga(struct libztex_device *ztex, int number);
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extern int libztex_selectFpga(struct libztex_device *ztex);
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extern int libztex_numberOfFpgas(struct libztex_device *ztex);
|
||||
|
||||
#endif /* __LIBZTEX_H__ */
|
||||
|
||||
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