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https://github.com/GOSTSec/sgminer
synced 2025-01-09 06:18:06 +00:00
Use cgsem timed waits in avalon driver to not miss any queued wake ups to account for async messages coming during a flush work.
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7011a7a008
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@ -1187,9 +1187,10 @@ static void *avalon_send_tasks(void *userdata)
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}
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avalon_rotate_array(avalon);
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pthread_cond_signal(&info->qcond);
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mutex_unlock(&info->qlock);
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cgsem_post(&info->qsem);
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if (unlikely(idled)) {
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applog(LOG_WARNING, "%s%i: Idled %d miners",
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avalon->drv->name, avalon->device_id, idled);
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@ -1271,9 +1272,10 @@ static void *bitburner_send_tasks(void *userdata)
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}
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bitburner_rotate_array(avalon);
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pthread_cond_signal(&info->qcond);
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mutex_unlock(&info->qlock);
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cgsem_post(&info->qsem);
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if (unlikely(idled)) {
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applog(LOG_WARNING, "%s%i: Idled %d miners",
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avalon->drv->name, avalon->device_id, idled);
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@ -1303,8 +1305,7 @@ static bool avalon_prepare(struct thr_info *thr)
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info->thr = thr;
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mutex_init(&info->lock);
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mutex_init(&info->qlock);
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if (unlikely(pthread_cond_init(&info->qcond, NULL)))
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quit(1, "Failed to pthread_cond_init avalon qcond");
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cgsem_init(&info->qsem);
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if (pthread_create(&info->read_thr, NULL, avalon_get_results, (void *)avalon))
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quit(1, "Failed to create avalon read_thr");
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@ -1513,22 +1514,15 @@ static int64_t avalon_scanhash(struct thr_info *thr)
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struct cgpu_info *avalon = thr->cgpu;
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struct avalon_info *info = avalon->device_data;
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const int miner_count = info->miner_count;
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struct timeval now, then, tdiff;
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int64_t hash_count, us_timeout;
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struct timespec abstime;
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int64_t hash_count, ms_timeout;
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/* Half nonce range */
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us_timeout = 0x80000000ll / info->asic_count / info->frequency;
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us_to_timeval(&tdiff, us_timeout);
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cgtime(&now);
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timeradd(&now, &tdiff, &then);
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timeval_to_spec(&abstime, &then);
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ms_timeout = 0x80000000ll / info->asic_count / info->frequency / 1000;
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/* Wait until avalon_send_tasks signals us that it has completed
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* sending its work or a full nonce range timeout has occurred */
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mutex_lock(&info->qlock);
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pthread_cond_timedwait(&info->qcond, &info->qlock, &abstime);
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mutex_unlock(&info->qlock);
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* sending its work or a full nonce range timeout has occurred. We use
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* cgsems to never miss a wakeup. */
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cgsem_mswait(&info->qsem, ms_timeout);
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mutex_lock(&info->lock);
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hash_count = 0xffffffffull * (uint64_t)info->nonces;
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@ -1567,8 +1561,10 @@ static void avalon_flush_work(struct cgpu_info *avalon)
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mutex_lock(&info->qlock);
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/* Will overwrite any work queued */
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avalon->queued = 0;
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pthread_cond_signal(&info->qcond);
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mutex_unlock(&info->qlock);
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/* Signal main loop we need more work */
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cgsem_post(&info->qsem);
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}
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static struct api_data *avalon_api_stats(struct cgpu_info *cgpu)
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@ -145,7 +145,7 @@ struct avalon_info {
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pthread_t write_thr;
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pthread_mutex_t lock;
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pthread_mutex_t qlock;
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pthread_cond_t qcond;
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cgsem_t qsem;
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int nonces;
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int auto_queued;
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