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https://github.com/GOSTSec/sgminer
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Created a threaded message parser for avalon reads.
This commit is contained in:
Con Kolivas
parent
ff44696a20
commit
7404446781
266
driver-avalon.c
266
driver-avalon.c
@ -203,100 +203,17 @@ static int avalon_send_task(int fd, const struct avalon_task *at,
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return AVA_SEND_BUFFER_EMPTY;
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}
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static inline int avalon_gets(int fd, uint8_t *buf, struct thr_info *thr,
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struct timeval *tv_finish)
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static void avalon_decode_nonce(struct thr_info *thr, struct cgpu_info *avalon,
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struct avalon_info *info, struct avalon_result *ar,
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struct work *work)
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{
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int read_amount = AVALON_READ_SIZE;
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bool first = true;
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ssize_t ret = 0;
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while (true) {
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struct timeval timeout;
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fd_set rd;
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if (unlikely(thr->work_restart)) {
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applog(LOG_DEBUG, "Avalon: Work restart");
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return AVA_GETS_RESTART;
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}
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timeout.tv_sec = 0;
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timeout.tv_usec = 100000;
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FD_ZERO(&rd);
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FD_SET((SOCKETTYPE)fd, &rd);
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ret = select(fd + 1, &rd, NULL, NULL, &timeout);
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if (unlikely(ret < 0)) {
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applog(LOG_ERR, "Avalon: Error %d on select in avalon_gets", errno);
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return AVA_GETS_ERROR;
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}
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if (ret) {
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ret = read(fd, buf, read_amount);
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if (unlikely(ret < 0)) {
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applog(LOG_ERR, "Avalon: Error %d on read in avalon_gets", errno);
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return AVA_GETS_ERROR;
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}
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if (likely(first)) {
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cgtime(tv_finish);
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first = false;
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}
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if (likely(ret >= read_amount))
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return AVA_GETS_OK;
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buf += ret;
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read_amount -= ret;
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continue;
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}
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if (unlikely(thr->work_restart)) {
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applog(LOG_DEBUG, "Avalon: Work restart");
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return AVA_GETS_RESTART;
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}
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return AVA_GETS_TIMEOUT;
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}
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}
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static int avalon_get_result(int fd, struct avalon_result *ar,
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struct thr_info *thr, struct timeval *tv_finish)
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{
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uint8_t result[AVALON_READ_SIZE];
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int ret;
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memset(result, 0, AVALON_READ_SIZE);
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ret = avalon_gets(fd, result, thr, tv_finish);
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if (ret == AVA_GETS_OK) {
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if (opt_debug) {
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applog(LOG_DEBUG, "Avalon: get:");
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hexdump((uint8_t *)result, AVALON_READ_SIZE);
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}
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memcpy((uint8_t *)ar, result, AVALON_READ_SIZE);
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}
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return ret;
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}
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static bool avalon_decode_nonce(struct thr_info *thr, struct avalon_result *ar,
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uint32_t *nonce)
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{
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struct cgpu_info *avalon;
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struct avalon_info *info;
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struct work *work;
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avalon = thr->cgpu;
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if (unlikely(!avalon->works))
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return false;
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work = find_queued_work_bymidstate(avalon, (char *)ar->midstate, 32,
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(char *)ar->data, 64, 12);
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if (!work)
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return false;
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uint32_t nonce;
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info = avalon->device_data;
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info->matching_work[work->subid]++;
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*nonce = htole32(ar->nonce);
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submit_nonce(thr, work, *nonce);
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return true;
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nonce = htole32(ar->nonce);
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applog(LOG_DEBUG, "Avalon: nonce = %0x08x", nonce);
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submit_nonce(thr, work, nonce);
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}
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static int avalon_write(int fd, char *buf, ssize_t len)
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@ -690,6 +607,100 @@ static void avalon_init(struct cgpu_info *avalon)
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applog(LOG_INFO, "Avalon: Opened on %s", avalon->device_path);
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}
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static struct work *avalon_valid_result(struct cgpu_info *avalon, struct avalon_result *ar)
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{
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return find_queued_work_bymidstate(avalon, (char *)ar->midstate, 32,
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(char *)ar->data, 64, 12);
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}
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static void avalon_parse_results(struct cgpu_info *avalon, struct avalon_info *info,
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struct thr_info *thr, char *buf, size_t *offset)
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{
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size_t i, spare = AVALON_READ_SIZE - *offset;
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bool found = false;
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if (spare > AVALON_READ_SIZE - 1)
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spare = AVALON_READ_SIZE - 1;
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for (i = 0; i <= spare; i++) {
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struct avalon_result *ar;
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struct work *work;
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ar = (struct avalon_result *)&buf[i];
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if ((work = avalon_valid_result(avalon, ar)) != NULL) {
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found = true;
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mutex_lock(&info->lock);
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info->nonces++;
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mutex_unlock(&info->lock);
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avalon_decode_nonce(thr, avalon, info, ar, work);
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break;
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}
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}
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spare = AVALON_READ_SIZE + i;
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*offset -= spare;
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memmove(buf, buf + spare, *offset);
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if (!found) {
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mutex_lock(&info->lock);
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info->no_matching_work++;
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mutex_unlock(&info->lock);
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}
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}
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static void *avalon_get_results(void *userdata)
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{
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struct cgpu_info *avalon = (struct cgpu_info *)userdata;
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struct avalon_info *info = avalon->device_data;
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const int rsize = AVALON_FTDI_READSIZE;
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char readbuf[AVALON_READBUF_SIZE];
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struct thr_info *thr = info->thr;
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int fd = avalon->device_fd;
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size_t offset = 0;
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pthread_detach(pthread_self());
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RenameThread("ava_getres");
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while (42) {
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struct timeval timeout;
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char buf[rsize];
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ssize_t ret;
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fd_set rd;
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if (unlikely(offset + rsize >= AVALON_READBUF_SIZE)) {
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/* This should never happen */
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applog(LOG_ERR, "Avalon readbuf overflow, resetting buffer");
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offset = 0;
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}
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timeout.tv_sec = 0;
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timeout.tv_usec = AVALON_READ_TIMEOUT * 1000;
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FD_ZERO(&rd);
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FD_SET((SOCKETTYPE)fd, &rd);
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ret = select(fd + 1, &rd, NULL, NULL, &timeout);
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if (ret < 1) {
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if (unlikely(ret < 0))
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applog(LOG_WARNING, "Select error in avalon_get_results");
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continue;
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}
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ret = read(fd, buf, AVALON_FTDI_READSIZE);
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if (unlikely(ret < 1)) {
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if (unlikely(ret < 0))
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applog(LOG_WARNING, "Read error in avalon_get_results");
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continue;
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}
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memcpy(&readbuf[offset], buf, ret);
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offset += ret;
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while (offset >= AVALON_READ_SIZE)
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avalon_parse_results(avalon, info, thr, readbuf, &offset);
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}
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return NULL;
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}
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static bool avalon_prepare(struct thr_info *thr)
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{
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struct cgpu_info *avalon = thr->cgpu;
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@ -702,6 +713,13 @@ static bool avalon_prepare(struct thr_info *thr)
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if (!avalon->works)
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quit(1, "Failed to calloc avalon works in avalon_prepare");
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info->thr = thr;
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mutex_init(&info->lock);
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avalon_clear_readbuf(avalon->device_fd);
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if (pthread_create(&info->read_thr, NULL, avalon_get_results, (void *)avalon))
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quit(1, "Failed to create avalon read_thr");
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avalon_init(avalon);
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cgtime(&now);
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@ -837,11 +855,9 @@ static int64_t avalon_scanhash(struct thr_info *thr)
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int avalon_get_work_count;
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int start_count, end_count;
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struct timeval tv_start, tv_finish, elapsed;
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uint32_t nonce;
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struct timeval tv_start, elapsed;
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int64_t hash_count;
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static int first_try = 0;
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int result_wrong;
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avalon = thr->cgpu;
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works = avalon->works;
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@ -892,72 +908,20 @@ static int64_t avalon_scanhash(struct thr_info *thr)
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elapsed.tv_sec = elapsed.tv_usec = 0;
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cgtime(&tv_start);
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result_wrong = 0;
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hash_count = 0;
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while (true) {
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full = avalon_buffer_full(fd);
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applog(LOG_DEBUG, "Avalon: Buffer full: %s",
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((full == AVA_BUFFER_FULL) ? "Yes" : "No"));
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if (unlikely(full == AVA_BUFFER_EMPTY))
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break;
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ret = avalon_get_result(fd, &ar, thr, &tv_finish);
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if (unlikely(ret == AVA_GETS_ERROR)) {
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applog(LOG_ERR,
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"AVA%i: Comms error(read)", avalon->device_id);
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dev_error(avalon, REASON_DEV_COMMS_ERROR);
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avalon_reset(avalon, fd);
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return 0;
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}
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if (unlikely(ret == AVA_GETS_RESTART))
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break;
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if (unlikely(ret == AVA_GETS_TIMEOUT)) {
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timersub(&tv_finish, &tv_start, &elapsed);
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applog(LOG_DEBUG, "Avalon: no nonce in (%ld.%06lds)",
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elapsed.tv_sec, elapsed.tv_usec);
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continue;
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}
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if (!avalon_decode_nonce(thr, &ar, &nonce)) {
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info->no_matching_work++;
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result_wrong++;
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if (unlikely(result_wrong >= avalon_get_work_count))
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break;
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if (opt_debug) {
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timersub(&tv_finish, &tv_start, &elapsed);
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applog(LOG_DEBUG,"Avalon: no matching work: %d"
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" (%ld.%06lds)", info->no_matching_work,
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elapsed.tv_sec, elapsed.tv_usec);
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}
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continue;
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}
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hash_count += 0xffffffff;
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if (opt_debug) {
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timersub(&tv_finish, &tv_start, &elapsed);
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applog(LOG_DEBUG,
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"Avalon: nonce = 0x%08x = 0x%08llx hashes "
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"(%ld.%06lds)", nonce, (unsigned long long)hash_count,
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elapsed.tv_sec, elapsed.tv_usec);
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}
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}
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if (hash_count && avalon->results < AVALON_ARRAY_SIZE)
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avalon->results++;
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if (unlikely((result_wrong >= avalon_get_work_count) ||
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(!hash_count && ret != AVA_GETS_RESTART && --avalon->results < 0))) {
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/* Look for all invalid results, or consecutive failure
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* to generate any results suggesting the FPGA
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* controller has screwed up. */
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applog(LOG_ERR,
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"AVA%i: FPGA controller messed up, %d wrong results",
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avalon->device_id, result_wrong);
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dev_error(avalon, REASON_DEV_COMMS_ERROR);
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avalon_reset(avalon, fd);
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return 0;
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nmsleep(40);
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}
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mutex_lock(&info->lock);
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hash_count = 0xffffffffull * (uint64_t)info->nonces;
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info->nonces = 0;
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mutex_unlock(&info->lock);
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avalon_rotate_array(avalon);
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if (hash_count) {
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@ -29,6 +29,8 @@
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#define AVALON_DEFAULT_ASIC_NUM 0xA
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#define AVALON_FTDI_READSIZE 512
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#define AVALON_READBUF_SIZE 8192
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#define AVALON_READ_TIMEOUT 10
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struct avalon_task {
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uint8_t reset :1;
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@ -97,6 +99,11 @@ struct avalon_info {
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int matching_work[AVALON_DEFAULT_MINER_NUM];
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int frequency;
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struct thr_info *thr;
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pthread_t read_thr;
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pthread_mutex_t lock;
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int nonces;
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};
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#define AVALON_WRITE_SIZE (sizeof(struct avalon_task))
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