mirror of
https://github.com/GOSTSec/sgminer
synced 2025-02-02 10:04:33 +00:00
Revert behaviour to old nonce init code.
This commit is contained in:
parent
a731de6e45
commit
70e8ade54f
@ -304,10 +304,10 @@ fi
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AC_DEFINE_UNQUOTED([CGMINER_PREFIX], ["$prefix/bin"], [Path to cgminer install])
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AC_DEFINE_UNQUOTED([CGMINER_PREFIX], ["$prefix/bin"], [Path to cgminer install])
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AC_DEFINE_UNQUOTED([PHATK_KERNNAME], ["phatk120222"], [Filename for phatk kernel])
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AC_DEFINE_UNQUOTED([PHATK_KERNNAME], ["phatk120223"], [Filename for phatk kernel])
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AC_DEFINE_UNQUOTED([POCLBM_KERNNAME], ["poclbm120222"], [Filename for poclbm kernel])
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AC_DEFINE_UNQUOTED([POCLBM_KERNNAME], ["poclbm120223"], [Filename for poclbm kernel])
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AC_DEFINE_UNQUOTED([DIAKGCN_KERNNAME], ["diakgcn120222"], [Filename for diakgcn kernel])
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AC_DEFINE_UNQUOTED([DIAKGCN_KERNNAME], ["diakgcn120223"], [Filename for diakgcn kernel])
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AC_DEFINE_UNQUOTED([DIABLO_KERNNAME], ["diablo120222"], [Filename for diablo kernel])
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AC_DEFINE_UNQUOTED([DIABLO_KERNNAME], ["diablo120223"], [Filename for diablo kernel])
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AC_SUBST(OPENCL_LIBS)
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AC_SUBST(OPENCL_LIBS)
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20
device-gpu.c
20
device-gpu.c
@ -740,7 +740,7 @@ static _clState *clStates[MAX_GPUDEVICES];
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#define CL_SET_ARG(var) status |= clSetKernelArg(*kernel, num++, sizeof(var), (void *)&var)
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#define CL_SET_ARG(var) status |= clSetKernelArg(*kernel, num++, sizeof(var), (void *)&var)
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#define CL_SET_VARG(args, var) status |= clSetKernelArg(*kernel, num++, args * sizeof(uint), (void *)var)
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#define CL_SET_VARG(args, var) status |= clSetKernelArg(*kernel, num++, args * sizeof(uint), (void *)var)
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static cl_int queue_poclbm_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint threads)
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static cl_int queue_poclbm_kernel(_clState *clState, dev_blk_ctx *blk)
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{
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{
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cl_kernel *kernel = &clState->kernel;
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cl_kernel *kernel = &clState->kernel;
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cl_uint vwidth = clState->vwidth;
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cl_uint vwidth = clState->vwidth;
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@ -767,7 +767,7 @@ static cl_int queue_poclbm_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint t
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nonces = alloca(sizeof(uint) * vwidth);
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nonces = alloca(sizeof(uint) * vwidth);
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for (i = 0; i < vwidth; i++)
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for (i = 0; i < vwidth; i++)
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nonces[i] = blk->nonce + (i * threads);
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nonces[i] = blk->nonce + i;
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CL_SET_VARG(vwidth, nonces);
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CL_SET_VARG(vwidth, nonces);
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CL_SET_BLKARG(fW0);
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CL_SET_BLKARG(fW0);
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@ -791,8 +791,7 @@ static cl_int queue_poclbm_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint t
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return status;
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return status;
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}
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}
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static cl_int queue_phatk_kernel(_clState *clState, dev_blk_ctx *blk,
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static cl_int queue_phatk_kernel(_clState *clState, dev_blk_ctx *blk)
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__maybe_unused cl_uint threads)
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{
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{
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cl_kernel *kernel = &clState->kernel;
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cl_kernel *kernel = &clState->kernel;
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cl_uint vwidth = clState->vwidth;
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cl_uint vwidth = clState->vwidth;
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@ -818,7 +817,7 @@ static cl_int queue_phatk_kernel(_clState *clState, dev_blk_ctx *blk,
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nonces = alloca(sizeof(uint) * vwidth);
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nonces = alloca(sizeof(uint) * vwidth);
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for (i = 0; i < vwidth; i++)
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for (i = 0; i < vwidth; i++)
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nonces[i] = blk->nonce + (i * threads);
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nonces[i] = blk->nonce + i;
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CL_SET_VARG(vwidth, nonces);
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CL_SET_VARG(vwidth, nonces);
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CL_SET_BLKARG(W16);
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CL_SET_BLKARG(W16);
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@ -835,8 +834,7 @@ static cl_int queue_phatk_kernel(_clState *clState, dev_blk_ctx *blk,
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return status;
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return status;
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}
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}
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static cl_int queue_diakgcn_kernel(_clState *clState, dev_blk_ctx *blk,
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static cl_int queue_diakgcn_kernel(_clState *clState, dev_blk_ctx *blk)
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__maybe_unused cl_uint threads)
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{
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{
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cl_kernel *kernel = &clState->kernel;
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cl_kernel *kernel = &clState->kernel;
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cl_uint vwidth = clState->vwidth;
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cl_uint vwidth = clState->vwidth;
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@ -894,7 +892,7 @@ static cl_int queue_diakgcn_kernel(_clState *clState, dev_blk_ctx *blk,
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return status;
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return status;
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}
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}
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static cl_int queue_diablo_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint threads)
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static cl_int queue_diablo_kernel(_clState *clState, dev_blk_ctx *blk)
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{
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{
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cl_kernel *kernel = &clState->kernel;
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cl_kernel *kernel = &clState->kernel;
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cl_uint vwidth = clState->vwidth;
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cl_uint vwidth = clState->vwidth;
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@ -904,7 +902,7 @@ static cl_int queue_diablo_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint t
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nonces = alloca(sizeof(uint) * vwidth);
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nonces = alloca(sizeof(uint) * vwidth);
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for (i = 0; i < vwidth; i++)
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for (i = 0; i < vwidth; i++)
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nonces[i] = blk->nonce + (i * threads);
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nonces[i] = blk->nonce + i;
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CL_SET_VARG(vwidth, nonces);
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CL_SET_VARG(vwidth, nonces);
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CL_SET_BLKARG(PreVal0);
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CL_SET_BLKARG(PreVal0);
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@ -1140,7 +1138,7 @@ static void get_opencl_statline(char *buf, struct cgpu_info *gpu)
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}
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}
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struct opencl_thread_data {
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struct opencl_thread_data {
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cl_int (*queue_kernel_parameters)(_clState *, dev_blk_ctx *, cl_uint);
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cl_int (*queue_kernel_parameters)(_clState *, dev_blk_ctx *);
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uint32_t *res;
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uint32_t *res;
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struct work *last_work;
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struct work *last_work;
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struct work _last_work;
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struct work _last_work;
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@ -1313,7 +1311,7 @@ static uint64_t opencl_scanhash(struct thr_info *thr, struct work *work,
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localThreads[0], gpu->intensity);
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localThreads[0], gpu->intensity);
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if (hashes > gpu->max_hashes)
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if (hashes > gpu->max_hashes)
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gpu->max_hashes = hashes;
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gpu->max_hashes = hashes;
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status = thrdata->queue_kernel_parameters(clState, &work->blk, globalThreads[0]);
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status = thrdata->queue_kernel_parameters(clState, &work->blk);
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if (unlikely(status != CL_SUCCESS)) {
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if (unlikely(status != CL_SUCCESS)) {
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applog(LOG_ERR, "Error: clSetKernelArg of all params failed.");
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applog(LOG_ERR, "Error: clSetKernelArg of all params failed.");
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return 0;
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return 0;
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@ -62,7 +62,13 @@ __kernel __attribute__((reqd_work_group_size(WORKSIZE, 1, 1))) void search(
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z ZA[930];
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z ZA[930];
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const z Znonce = base + (uint)(get_global_id(0));
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#ifdef VECTORS4
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const z Znonce = base + (uint)(get_local_id(0)) * 4u + (uint)(get_group_id(0)) * (WORKSIZE * 4u);
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#elif defined VECTORS2
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const z Znonce = base + (uint)(get_local_id(0)) * 2u + (uint)(get_group_id(0)) * (WORKSIZE * 2u);
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#else
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const z Znonce = base + get_local_id(0) + get_group_id(0) * (WORKSIZE);
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#endif
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ZA[15] = Znonce + PreVal4_state0;
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ZA[15] = Znonce + PreVal4_state0;
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@ -1237,27 +1243,29 @@ __kernel __attribute__((reqd_work_group_size(WORKSIZE, 1, 1))) void search(
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#define NFLAG (0x7F)
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#define NFLAG (0x7F)
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#if defined(VECTORS4)
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#if defined(VECTORS4)
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bool result = any(ZA[924] == 0x136032EDU);
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ZA[924] ^= 0x136032EDU;
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bool result = ZA[924].x & ZA[924].y & ZA[924].z & ZA[924].w;
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if (result) {
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if (!result) {
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output[FOUND] = FOUND;
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output[FOUND] = FOUND;
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if (ZA[924].x == 0x136032EDU)
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if (!ZA[924].xU)
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output[NFLAG & Znonce.x] = Znonce.x;
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output[NFLAG & Znonce.x] = Znonce.x;
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if (ZA[924].y == 0x136032EDU)
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if (!ZA[924].y)
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output[NFLAG & Znonce.y] = Znonce.y;
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output[NFLAG & Znonce.y] = Znonce.y;
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if (ZA[924].z == 0x136032EDU)
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if (!ZA[924].z)
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output[NFLAG & Znonce.z] = Znonce.z;
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output[NFLAG & Znonce.z] = Znonce.z;
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if (ZA[924].w == 0x136032EDU)
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if (!ZA[924].w)
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output[NFLAG & Znonce.w] = Znonce.w;
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output[NFLAG & Znonce.w] = Znonce.w;
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}
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}
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#elif defined(VECTORS2)
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#elif defined(VECTORS2)
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bool result = any(ZA[924] == 0x136032EDU);
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ZA[924] ^= 0x136032EDU;
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bool result = ZA[924].x & ZA[924].y;
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if (result) {
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if (!result) {
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output[FOUND] = FOUND;
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output[FOUND] = FOUND;
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if (ZA[924].x == 0x136032EDU)
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if (!ZA[924].xU)
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output[NFLAG & Znonce.x] = Znonce.x;
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output[NFLAG & Znonce.x] = Znonce.x;
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if (ZA[924].y == 0x136032EDU)
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if (!ZA[924].y)
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output[NFLAG & Znonce.y] = Znonce.y;
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output[NFLAG & Znonce.y] = Znonce.y;
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}
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}
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#else
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#else
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@ -186,13 +186,25 @@ void search( const uint state0, const uint state1, const uint state2, const uint
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W[16] = W16;
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W[16] = W16;
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W[17] = W17;
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W[17] = W17;
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W[3] = base + (uint)get_global_id(0);
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#ifdef VECTORS4
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//Less dependencies to get both the local id and group id and then add them
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W[3] = base + (uint)(get_local_id(0)) * 4u + (uint)(get_group_id(0)) * (WORKSIZE * 4u);
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uint r = rot(W[3].x,25u)^rot(W[3].x,14u)^((W[3].x)>>3U);
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//Since only the 2 LSB is opposite between the nonces, we can save an instruction by flipping the 4 bits in W18 rather than the 1 bit in W3
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W[18] = PreW18 + (u){r, r ^ 0x2004000U, r ^ 0x4008000U, r ^ 0x600C000U};
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#elif defined VECTORS2
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W[3] = base + (uint)(get_local_id(0)) * 2u + (uint)(get_group_id(0)) * (WORKSIZE * 2u);
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uint r = rot(W[3].x,25u)^rot(W[3].x,14u)^((W[3].x)>>3U);
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W[18] = PreW18 + (u){r, r ^ 0x2004000U};
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#else
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W[3] = base + get_local_id(0) + get_group_id(0) * (WORKSIZE);
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u r = rot(W[3],25u)^rot(W[3],14u)^((W[3])>>3U);
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u r = rot(W[3],25u)^rot(W[3],14u)^((W[3])>>3U);
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W[18] = PreW18 + r;
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W[18] = PreW18 + r;
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#endif
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//the order of the W calcs and Rounds is like this because the compiler needs help finding how to order the instructions
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//the order of the W calcs and Rounds is like this because the compiler needs help finding how to order the instructions
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Vals[4] = PreVal4 + W[3];
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Vals[4] = PreVal4 + W[3];
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Vals[0] = PreVal0 + W[3];
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Vals[0] = PreVal0 + W[3];
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@ -82,7 +82,13 @@ __kernel void search(const uint state0, const uint state1, const uint state2, co
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u W[24];
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u W[24];
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u *Vals = &W[16]; // Now put at W[16] to be in same array
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u *Vals = &W[16]; // Now put at W[16] to be in same array
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const u nonce = base + (uint)(get_global_id(0));
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#ifdef VECTORS4
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const u nonce = base + (uint)(get_local_id(0)) * 4u + (uint)(get_group_id(0)) * (WORKSIZE * 4u);
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#elif defined VECTORS2
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const u nonce = base + (uint)(get_local_id(0)) * 2u + (uint)(get_group_id(0)) * (WORKSIZE * 2u);
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#else
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const u nonce = base + get_local_id(0) + get_group_id(0) * (WORKSIZE);
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#endif
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Vals[0]=Preval0+nonce;
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Vals[0]=Preval0+nonce;
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@ -164,7 +170,7 @@ Vals[1]+=(rotr(Vals[2],2)^rotr(Vals[2],13)^rotr(Vals[2],22));
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Vals[1]+=Ma(Vals[4],Vals[2],Vals[3]);
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Vals[1]+=Ma(Vals[4],Vals[2],Vals[3]);
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Vals[0]+=(rotr(Vals[5],6)^rotr(Vals[5],11)^rotr(Vals[5],25));
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Vals[0]+=(rotr(Vals[5],6)^rotr(Vals[5],11)^rotr(Vals[5],25));
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Vals[0]+=ch(Vals[5],Vals[6],Vals[7]);
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Vals[0]+=ch(Vals[5],Vals[6],Vals[7]);
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Vals[0]+=0xC19BF3F4U;
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Vals[0]+=0xC19BF3F4;
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Vals[4]+=Vals[0];
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Vals[4]+=Vals[0];
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Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
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Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
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Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
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Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
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@ -201,7 +207,7 @@ Vals[0]+=Vals[4];
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Vals[4]+=(rotr(Vals[5],2)^rotr(Vals[5],13)^rotr(Vals[5],22));
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Vals[4]+=(rotr(Vals[5],2)^rotr(Vals[5],13)^rotr(Vals[5],22));
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W[4]=(rotr(W[2],17)^rotr(W[2],19)^(W[2]>>10U));
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W[4]=(rotr(W[2],17)^rotr(W[2],19)^(W[2]>>10U));
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W[4]+=0x80000000U;
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W[4]+=0x80000000;
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Vals[3]+=W[4];
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Vals[3]+=W[4];
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Vals[3]+=(rotr(Vals[0],6)^rotr(Vals[0],11)^rotr(Vals[0],25));
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Vals[3]+=(rotr(Vals[0],6)^rotr(Vals[0],11)^rotr(Vals[0],25));
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Vals[3]+=ch(Vals[0],Vals[1],Vals[2]);
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Vals[3]+=ch(Vals[0],Vals[1],Vals[2]);
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@ -652,14 +658,14 @@ W[0]=Vals[0];
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W[7]=state7;
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W[7]=state7;
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W[7]+=Vals[7];
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W[7]+=Vals[7];
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Vals[7]=0xF377ED68U;
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Vals[7]=0xF377ED68;
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W[0]+=state0;
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W[0]+=state0;
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Vals[7]+=W[0];
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Vals[7]+=W[0];
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W[3]=state3;
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W[3]=state3;
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W[3]+=Vals[3];
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W[3]+=Vals[3];
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Vals[3]=0xa54ff53aU;
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Vals[3]=0xa54ff53a;
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Vals[3]+=Vals[7];
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Vals[3]+=Vals[7];
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W[1]=Vals[1];
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W[1]=Vals[1];
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@ -668,7 +674,7 @@ W[1]+=state1;
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W[6]=state6;
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W[6]=state6;
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W[6]+=Vals[6];
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W[6]+=Vals[6];
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Vals[6]=0x90BB1E3CU;
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Vals[6]=0x90BB1E3C;
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Vals[6]+=(rotr(Vals[3],6)^rotr(Vals[3],11)^rotr(Vals[3],25));
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Vals[6]+=(rotr(Vals[3],6)^rotr(Vals[3],11)^rotr(Vals[3],25));
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Vals[6]+=(0x9b05688cU^(Vals[3]&0xca0b3af3U));
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Vals[6]+=(0x9b05688cU^(Vals[3]&0xca0b3af3U));
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@ -684,7 +690,7 @@ Vals[6]+=(rotr(Vals[7],2)^rotr(Vals[7],13)^rotr(Vals[7],22));
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W[5]=state5;
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W[5]=state5;
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W[5]+=Vals[5];
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W[5]+=Vals[5];
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Vals[5]=0x150C6645BU;
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Vals[5]=0x150C6645B;
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Vals[5]+=(rotr(Vals[2],6)^rotr(Vals[2],11)^rotr(Vals[2],25));
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Vals[5]+=(rotr(Vals[2],6)^rotr(Vals[2],11)^rotr(Vals[2],25));
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Vals[5]+=ch(Vals[2],Vals[3],0x510e527fU);
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Vals[5]+=ch(Vals[2],Vals[3],0x510e527fU);
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Vals[5]+=W[2];
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Vals[5]+=W[2];
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@ -697,7 +703,7 @@ Vals[5]+=(rotr(Vals[6],2)^rotr(Vals[6],13)^rotr(Vals[6],22));
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W[4]=state4;
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W[4]=state4;
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W[4]+=Vals[4];
|
W[4]+=Vals[4];
|
||||||
|
|
||||||
Vals[4]=0x13AC42E24U;
|
Vals[4]=0x13AC42E24;
|
||||||
Vals[4]+=(rotr(Vals[1],6)^rotr(Vals[1],11)^rotr(Vals[1],25));
|
Vals[4]+=(rotr(Vals[1],6)^rotr(Vals[1],11)^rotr(Vals[1],25));
|
||||||
Vals[4]+=ch(Vals[1],Vals[2],Vals[3]);
|
Vals[4]+=ch(Vals[1],Vals[2],Vals[3]);
|
||||||
Vals[4]+=W[3];
|
Vals[4]+=W[3];
|
||||||
@ -736,7 +742,7 @@ Vals[4]+=Vals[0];
|
|||||||
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
||||||
Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
|
Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
|
||||||
Vals[7]+=ch(Vals[4],Vals[5],Vals[6]);
|
Vals[7]+=ch(Vals[4],Vals[5],Vals[6]);
|
||||||
Vals[7]+=0x5807AA98U;
|
Vals[7]+=0x15807AA98;
|
||||||
Vals[0]+=Ma(Vals[3],Vals[1],Vals[2]);
|
Vals[0]+=Ma(Vals[3],Vals[1],Vals[2]);
|
||||||
Vals[3]+=Vals[7];
|
Vals[3]+=Vals[7];
|
||||||
Vals[7]+=(rotr(Vals[0],2)^rotr(Vals[0],13)^rotr(Vals[0],22));
|
Vals[7]+=(rotr(Vals[0],2)^rotr(Vals[0],13)^rotr(Vals[0],22));
|
||||||
@ -779,7 +785,7 @@ Vals[1]+=(rotr(Vals[2],2)^rotr(Vals[2],13)^rotr(Vals[2],22));
|
|||||||
Vals[1]+=Ma(Vals[4],Vals[2],Vals[3]);
|
Vals[1]+=Ma(Vals[4],Vals[2],Vals[3]);
|
||||||
Vals[0]+=(rotr(Vals[5],6)^rotr(Vals[5],11)^rotr(Vals[5],25));
|
Vals[0]+=(rotr(Vals[5],6)^rotr(Vals[5],11)^rotr(Vals[5],25));
|
||||||
Vals[0]+=ch(Vals[5],Vals[6],Vals[7]);
|
Vals[0]+=ch(Vals[5],Vals[6],Vals[7]);
|
||||||
Vals[0]+=0xC19BF274U;
|
Vals[0]+=0xC19BF274;
|
||||||
Vals[4]+=Vals[0];
|
Vals[4]+=Vals[0];
|
||||||
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
||||||
Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
|
Vals[7]+=(rotr(Vals[4],6)^rotr(Vals[4],11)^rotr(Vals[4],25));
|
||||||
@ -856,7 +862,7 @@ Vals[0]+=W[7];
|
|||||||
Vals[4]+=Vals[0];
|
Vals[4]+=Vals[0];
|
||||||
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
Vals[0]+=(rotr(Vals[1],2)^rotr(Vals[1],13)^rotr(Vals[1],22));
|
||||||
|
|
||||||
W[8]=0x80000000U;
|
W[8]=0x80000000;
|
||||||
W[8]+=W[1];
|
W[8]+=W[1];
|
||||||
W[8]+=(rotr(W[6],17)^rotr(W[6],19)^(W[6]>>10U));
|
W[8]+=(rotr(W[6],17)^rotr(W[6],19)^(W[6]>>10U));
|
||||||
Vals[7]+=W[8];
|
Vals[7]+=W[8];
|
Loading…
x
Reference in New Issue
Block a user