Remove code for Bitcoin GPU kernel execution.

cgminer.c

@@ -4232,18 +4232,6 @@ void write_config(FILE *fcfg)
 			switch (gpus[i].kernel) {
 				case KL_NONE: // Shouldn't happen
 					break;
-				case KL_POCLBM:
-					fprintf(fcfg, "poclbm");
-					break;
-				case KL_PHATK:
-					fprintf(fcfg, "phatk");
-					break;
-				case KL_DIAKGCN:
-					fprintf(fcfg, "diakgcn");
-					break;
-				case KL_DIABLO:
-					fprintf(fcfg, "diablo");
-					break;
 				case KL_SCRYPT:
 					fprintf(fcfg, "scrypt");
 					break;
@@ -5755,7 +5743,7 @@ void set_target(unsigned char *dest_target, double diff)
 		diff = 1.0;
 	}
 
-	// FIXME: target set wrong?
+	// FIXME: is target set right?
 	d64 = (double)65536 * truediffone;
 	d64 /= diff;
 

driver-opencl.c

@@ -840,217 +840,6 @@ static _clState *clStates[MAX_GPUDEVICES];
 #define CL_SET_ARG(var) status |= clSetKernelArg(*kernel, num++, sizeof(var), (void *)&var)
 #define CL_SET_VARG(args, var) status |= clSetKernelArg(*kernel, num++, args * sizeof(uint), (void *)var)
 
-static cl_int queue_poclbm_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint threads)
-{
-	cl_kernel *kernel = &clState->kernel;
-	unsigned int num = 0;
-	cl_int status = 0;
-
-	CL_SET_BLKARG(ctx_a);
-	CL_SET_BLKARG(ctx_b);
-	CL_SET_BLKARG(ctx_c);
-	CL_SET_BLKARG(ctx_d);
-	CL_SET_BLKARG(ctx_e);
-	CL_SET_BLKARG(ctx_f);
-	CL_SET_BLKARG(ctx_g);
-	CL_SET_BLKARG(ctx_h);
-
-	CL_SET_BLKARG(cty_b);
-	CL_SET_BLKARG(cty_c);
-
-	
-	CL_SET_BLKARG(cty_f);
-	CL_SET_BLKARG(cty_g);
-	CL_SET_BLKARG(cty_h);
-
-	if (!clState->goffset) {
-		cl_uint vwidth = clState->vwidth;
-		uint *nonces = alloca(sizeof(uint) * vwidth);
-		unsigned int i;
-
-		for (i = 0; i < vwidth; i++)
-			nonces[i] = blk->nonce + (i * threads);
-		CL_SET_VARG(vwidth, nonces);
-	}
-
-	CL_SET_BLKARG(fW0);
-	CL_SET_BLKARG(fW1);
-	CL_SET_BLKARG(fW2);
-	CL_SET_BLKARG(fW3);
-	CL_SET_BLKARG(fW15);
-	CL_SET_BLKARG(fW01r);
-
-	CL_SET_BLKARG(D1A);
-	CL_SET_BLKARG(C1addK5);
-	CL_SET_BLKARG(B1addK6);
-	CL_SET_BLKARG(W16addK16);
-	CL_SET_BLKARG(W17addK17);
-	CL_SET_BLKARG(PreVal4addT1);
-	CL_SET_BLKARG(PreVal0);
-
-	CL_SET_ARG(clState->outputBuffer);
-
-	return status;
-}
-
-static cl_int queue_phatk_kernel(_clState *clState, dev_blk_ctx *blk,
-				 __maybe_unused cl_uint threads)
-{
-	cl_kernel *kernel = &clState->kernel;
-	cl_uint vwidth = clState->vwidth;
-	unsigned int i, num = 0;
-	cl_int status = 0;
-	uint *nonces;
-
-	CL_SET_BLKARG(ctx_a);
-	CL_SET_BLKARG(ctx_b);
-	CL_SET_BLKARG(ctx_c);
-	CL_SET_BLKARG(ctx_d);
-	CL_SET_BLKARG(ctx_e);
-	CL_SET_BLKARG(ctx_f);
-	CL_SET_BLKARG(ctx_g);
-	CL_SET_BLKARG(ctx_h);
-
-	CL_SET_BLKARG(cty_b);
-	CL_SET_BLKARG(cty_c);
-	CL_SET_BLKARG(cty_d);
-	CL_SET_BLKARG(cty_f);
-	CL_SET_BLKARG(cty_g);
-	CL_SET_BLKARG(cty_h);
-
-	nonces = alloca(sizeof(uint) * vwidth);
-	for (i = 0; i < vwidth; i++)
-		nonces[i] = blk->nonce + i;
-	CL_SET_VARG(vwidth, nonces);
-
-	CL_SET_BLKARG(W16);
-	CL_SET_BLKARG(W17);
-	CL_SET_BLKARG(PreVal4_2);
-	CL_SET_BLKARG(PreVal0);
-	CL_SET_BLKARG(PreW18);
-	CL_SET_BLKARG(PreW19);
-	CL_SET_BLKARG(PreW31);
-	CL_SET_BLKARG(PreW32);
-
-	CL_SET_ARG(clState->outputBuffer);
-
-	return status;
-}
-
-static cl_int queue_diakgcn_kernel(_clState *clState, dev_blk_ctx *blk,
-				   __maybe_unused cl_uint threads)
-{
-	cl_kernel *kernel = &clState->kernel;
-	unsigned int num = 0;
-	cl_int status = 0;
-
-	if (!clState->goffset) {
-		cl_uint vwidth = clState->vwidth;
-		uint *nonces = alloca(sizeof(uint) * vwidth);
-		unsigned int i;
-		for (i = 0; i < vwidth; i++)
-			nonces[i] = blk->nonce + i;
-		CL_SET_VARG(vwidth, nonces);
-	}
-
-	CL_SET_BLKARG(PreVal0);
-	CL_SET_BLKARG(PreVal4_2);
-	CL_SET_BLKARG(cty_h);
-	CL_SET_BLKARG(D1A);
-	CL_SET_BLKARG(cty_b);
-	CL_SET_BLKARG(cty_c);
-	CL_SET_BLKARG(cty_f);
-	CL_SET_BLKARG(cty_g);
-	CL_SET_BLKARG(C1addK5);
-	CL_SET_BLKARG(B1addK6);
-	CL_SET_BLKARG(PreVal0addK7);
-	CL_SET_BLKARG(W16addK16);
-	CL_SET_BLKARG(W17addK17);
-	CL_SET_BLKARG(PreW18);
-	CL_SET_BLKARG(PreW19);
-	CL_SET_BLKARG(W16);
-	CL_SET_BLKARG(W17);
-	CL_SET_BLKARG(PreW31);
-	CL_SET_BLKARG(PreW32);
-
-	CL_SET_BLKARG(ctx_a);
-	CL_SET_BLKARG(ctx_b);
-	CL_SET_BLKARG(ctx_c);
-	CL_SET_BLKARG(ctx_d);
-	CL_SET_BLKARG(ctx_e);
-	CL_SET_BLKARG(ctx_f);
-	CL_SET_BLKARG(ctx_g);
-	CL_SET_BLKARG(ctx_h);
-
-	CL_SET_BLKARG(zeroA);
-	CL_SET_BLKARG(zeroB);
-
-	CL_SET_BLKARG(oneA);
-	CL_SET_BLKARG(twoA);
-	CL_SET_BLKARG(threeA);
-	CL_SET_BLKARG(fourA);
-	CL_SET_BLKARG(fiveA);
-	CL_SET_BLKARG(sixA);
-	CL_SET_BLKARG(sevenA);
-
-	CL_SET_ARG(clState->outputBuffer);
-
-	return status;
-}
-
-static cl_int queue_diablo_kernel(_clState *clState, dev_blk_ctx *blk, cl_uint threads)
-{
-	cl_kernel *kernel = &clState->kernel;
-	unsigned int num = 0;
-	cl_int status = 0;
-
-	if (!clState->goffset) {
-		cl_uint vwidth = clState->vwidth;
-		uint *nonces = alloca(sizeof(uint) * vwidth);
-		unsigned int i;
-
-		for (i = 0; i < vwidth; i++)
-			nonces[i] = blk->nonce + (i * threads);
-		CL_SET_VARG(vwidth, nonces);
-	}
-
-
-	CL_SET_BLKARG(PreVal0);
-	CL_SET_BLKARG(PreVal0addK7);
-	CL_SET_BLKARG(PreVal4addT1);
-	CL_SET_BLKARG(PreW18);
-	CL_SET_BLKARG(PreW19);
-	CL_SET_BLKARG(W16);
-	CL_SET_BLKARG(W17);
-	CL_SET_BLKARG(W16addK16);
-	CL_SET_BLKARG(W17addK17);
-	CL_SET_BLKARG(PreW31);
-	CL_SET_BLKARG(PreW32);
-
-	CL_SET_BLKARG(D1A);
-	CL_SET_BLKARG(cty_b);
-	CL_SET_BLKARG(cty_c);
-	CL_SET_BLKARG(cty_h);
-	CL_SET_BLKARG(cty_f);
-	CL_SET_BLKARG(cty_g);
-
-	CL_SET_BLKARG(C1addK5);
-	CL_SET_BLKARG(B1addK6);
-
-	CL_SET_BLKARG(ctx_a);
-	CL_SET_BLKARG(ctx_b);
-	CL_SET_BLKARG(ctx_c);
-	CL_SET_BLKARG(ctx_d);
-	CL_SET_BLKARG(ctx_e);
-	CL_SET_BLKARG(ctx_f);
-	CL_SET_BLKARG(ctx_g);
-	CL_SET_BLKARG(ctx_h);
-
-	CL_SET_ARG(clState->outputBuffer);
-
-	return status;
-}
-
 static cl_int queue_scrypt_kernel(_clState *clState, dev_blk_ctx *blk, __maybe_unused cl_uint threads)
 {
 	unsigned char *midstate = blk->work->midstate;

miner.h

@@ -372,10 +372,6 @@ enum dev_enable {
 
 enum cl_kernels {
 	KL_NONE,
-	KL_POCLBM,
-	KL_PHATK,
-	KL_DIAKGCN,
-	KL_DIABLO,
 	KL_SCRYPT,
 };