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Merge branch 'master' into avalon-dev

nfactor-troky
ckolivas 12 years ago
parent
commit
42e8eac9dc
  1. 11
      README
  2. 6
      cgminer.c
  3. 31
      driver-avalon.c

11
README

@ -960,6 +960,14 @@ their various features. Linux offers much better long term stability and @@ -960,6 +960,14 @@ their various features. Linux offers much better long term stability and
remote monitoring and security, while windows offers you overclocking tools
that can achieve much more than cgminer can do on linux.
Q: Can I mine with cgminer on a MAC?
A: cgminer will compile on OSX, but the performance of GPU mining is
compromised due to the opencl implementation on OSX, there is no temperature
or fanspeed monitoring, and the cooling design of most MACs, despite having
powerful GPUs, will usually not cope with constant usage leading to a high
risk of thermal damage. It is highly recommended not to mine on a MAC unless
it is to a USB device.
Q: Cgminer cannot see any of my GPUs even though I have configured them all
to be enabled and installed OpenCL (+/- Xorg is running and the DISPLAY
variable is exported on linux)?
@ -1049,7 +1057,8 @@ you are running. However if you change SDKs you should delete any generated @@ -1049,7 +1057,8 @@ you are running. However if you change SDKs you should delete any generated
Q: I switch users on windows and my mining stops working?
A: That's correct, it does. It's a permissions issue that there is no known
fix for.
fix for due to monitoring of GPU fanspeeds and temperatures. If you disable
the monitoring with --no-adl it should switch okay.
Q: My network gets slower and slower and then dies for a minute?
A; Try the --net-delay option.

6
cgminer.c

@ -5910,13 +5910,13 @@ void hash_queued_work(struct thr_info *mythr) @@ -5910,13 +5910,13 @@ void hash_queued_work(struct thr_info *mythr)
memcpy(&tv_start, &tv_end, sizeof(struct timeval));
}
if (unlikely(mythr->pause || cgpu->deven != DEV_ENABLED))
mt_disable(mythr, thr_id, drv);
if (unlikely(mythr->work_restart)) {
flush_queue(cgpu);
drv->flush_work(cgpu);
}
if (unlikely(mythr->pause || cgpu->deven != DEV_ENABLED))
mt_disable(mythr, thr_id, drv);
}
}

31
driver-avalon.c

@ -929,22 +929,21 @@ static int64_t avalon_scanhash(struct thr_info *thr) @@ -929,22 +929,21 @@ static int64_t avalon_scanhash(struct thr_info *thr)
elapsed.tv_sec, elapsed.tv_usec);
}
}
if (hash_count) {
if (avalon->results < AVALON_ARRAY_SIZE)
avalon->results++;
} else if (unlikely((result_wrong >= avalon_get_work_count ) ||
(ret != AVA_GETS_RESTART && --avalon->results < 0))) {
/* Look for all invalid results, or consecutive failure
* to generate any results suggesting the FPGA
* controller has screwed up. */
do_avalon_close(thr);
applog(LOG_ERR,
"AVA%i: FPGA controller messed up, %d wrong results",
avalon->device_id, result_wrong);
dev_error(avalon, REASON_DEV_COMMS_ERROR);
sleep(1);
avalon_init(avalon);
return 0;
if (hash_count && avalon->results < AVALON_ARRAY_SIZE)
avalon->results++;
if (unlikely((result_wrong >= avalon_get_work_count) ||
(!hash_count && ret != AVA_GETS_RESTART && --avalon->results < 0))) {
/* Look for all invalid results, or consecutive failure
* to generate any results suggesting the FPGA
* controller has screwed up. */
do_avalon_close(thr);
applog(LOG_ERR,
"AVA%i: FPGA controller messed up, %d wrong results",
avalon->device_id, result_wrong);
dev_error(avalon, REASON_DEV_COMMS_ERROR);
sleep(1);
avalon_init(avalon);
return 0;
}
avalon_rotate_array(avalon);

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