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/*
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* Copyright 2013 Con Kolivas <kernel@kolivas.org>
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* Copyright 2012-2013 Xiangfu <xiangfu@openmobilefree.com>
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* Copyright 2012 Luke Dashjr
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* Copyright 2012 Andrew Smith
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 3 of the License, or (at your option)
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* any later version. See COPYING for more details.
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*/
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#include "config.h"
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#include <limits.h>
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#include <pthread.h>
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#include <stdio.h>
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#include <sys/time.h>
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#include <sys/types.h>
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#include <sys/select.h>
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#include <dirent.h>
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#include <unistd.h>
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#ifndef WIN32
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#include <termios.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#ifndef O_CLOEXEC
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#define O_CLOEXEC 0
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#endif
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#else
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#include <windows.h>
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#include <io.h>
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#endif
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#include "elist.h"
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#include "miner.h"
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#include "fpgautils.h"
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#include "driver-avalon.h"
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#include "hexdump.c"
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static int option_offset = -1;
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struct avalon_info **avalon_infos;
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struct device_drv avalon_drv;
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static int avalon_init_task(struct avalon_task *at,
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uint8_t reset, uint8_t ff, uint8_t fan,
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uint8_t timeout, uint8_t asic_num,
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uint8_t miner_num, uint8_t nonce_elf,
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uint8_t gate_miner, int frequency)
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{
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uint8_t *buf;
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static bool first = true;
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if (unlikely(!at))
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return -1;
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if (unlikely(timeout <= 0 || asic_num <= 0 || miner_num <= 0))
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return -1;
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memset(at, 0, sizeof(struct avalon_task));
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if (unlikely(reset)) {
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at->reset = 1;
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at->fan_eft = 1;
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at->timer_eft = 1;
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first = true;
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}
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at->flush_fifo = (ff ? 1 : 0);
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at->fan_eft = (fan ? 1 : 0);
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if (unlikely(first && !at->reset)) {
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at->fan_eft = 1;
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at->timer_eft = 1;
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first = false;
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}
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at->fan_pwm_data = (fan ? fan : AVALON_DEFAULT_FAN_MAX_PWM);
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at->timeout_data = timeout;
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at->asic_num = asic_num;
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at->miner_num = miner_num;
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at->nonce_elf = nonce_elf;
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at->gate_miner_elf = 1;
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at->asic_pll = 1;
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if (unlikely(gate_miner)) {
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at-> gate_miner = 1;
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at->asic_pll = 0;
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}
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buf = (uint8_t *)at;
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buf[5] = 0x00;
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buf[8] = 0x74;
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buf[9] = 0x01;
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buf[10] = 0x00;
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buf[11] = 0x00;
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if (frequency == 256) {
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buf[6] = 0x03;
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buf[7] = 0x08;
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} else if (frequency == 270) {
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buf[6] = 0x73;
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buf[7] = 0x08;
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} else if (frequency == 282) {
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buf[6] = 0xd3;
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buf[7] = 0x08;
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} else if (frequency == 300) {
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buf[6] = 0x63;
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buf[7] = 0x09;
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}
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return 0;
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}
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static inline void avalon_create_task(struct avalon_task *at,
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struct work *work)
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{
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memcpy(at->midstate, work->midstate, 32);
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memcpy(at->data, work->data + 64, 12);
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}
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static int avalon_send_task(int fd, const struct avalon_task *at,
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struct cgpu_info *avalon)
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{
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size_t ret;
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int full;
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struct timespec p;
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uint8_t buf[AVALON_WRITE_SIZE + 4 * AVALON_DEFAULT_ASIC_NUM];
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size_t nr_len;
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struct avalon_info *info;
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uint64_t delay = 32000000; /* Default 32ms for B19200 */
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uint32_t nonce_range;
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int i;
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if (at->nonce_elf)
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nr_len = AVALON_WRITE_SIZE + 4 * at->asic_num;
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else
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nr_len = AVALON_WRITE_SIZE;
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memcpy(buf, at, AVALON_WRITE_SIZE);
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if (at->nonce_elf) {
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nonce_range = (uint32_t)0xffffffff / at->asic_num;
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for (i = 0; i < at->asic_num; i++) {
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buf[AVALON_WRITE_SIZE + (i * 4) + 3] =
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(i * nonce_range & 0xff000000) >> 24;
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buf[AVALON_WRITE_SIZE + (i * 4) + 2] =
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(i * nonce_range & 0x00ff0000) >> 16;
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buf[AVALON_WRITE_SIZE + (i * 4) + 1] =
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(i * nonce_range & 0x0000ff00) >> 8;
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buf[AVALON_WRITE_SIZE + (i * 4) + 0] =
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(i * nonce_range & 0x000000ff) >> 0;
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}
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}
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#if defined(__BIG_ENDIAN__) || defined(MIPSEB)
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uint8_t tt = 0;
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tt = (buf[0] & 0x0f) << 4;
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tt |= ((buf[0] & 0x10) ? (1 << 3) : 0);
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tt |= ((buf[0] & 0x20) ? (1 << 2) : 0);
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tt |= ((buf[0] & 0x40) ? (1 << 1) : 0);
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tt |= ((buf[0] & 0x80) ? (1 << 0) : 0);
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buf[0] = tt;
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tt = (buf[4] & 0x0f) << 4;
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tt |= ((buf[4] & 0x10) ? (1 << 3) : 0);
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tt |= ((buf[4] & 0x20) ? (1 << 2) : 0);
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tt |= ((buf[4] & 0x40) ? (1 << 1) : 0);
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tt |= ((buf[4] & 0x80) ? (1 << 0) : 0);
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buf[4] = tt;
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#endif
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if (likely(avalon)) {
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info = avalon_infos[avalon->device_id];
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delay = nr_len * 10 * 1000000000ULL;
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delay = delay / info->baud;
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}
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if (at->reset)
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nr_len = 1;
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if (opt_debug) {
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applog(LOG_DEBUG, "Avalon: Sent(%d):", nr_len);
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hexdump((uint8_t *)buf, nr_len);
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}
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ret = write(fd, buf, nr_len);
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if (unlikely(ret != nr_len))
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return AVA_SEND_ERROR;
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p.tv_sec = 0;
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p.tv_nsec = (long)delay + 4000000;
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nanosleep(&p, NULL);
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applog(LOG_DEBUG, "Avalon: Sent: Buffer delay: %ld", p.tv_nsec);
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full = avalon_buffer_full(fd);
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applog(LOG_DEBUG, "Avalon: Sent: Buffer full: %s",
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((full == AVA_BUFFER_FULL) ? "Yes" : "No"));
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if (unlikely(full == AVA_BUFFER_FULL))
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return AVA_SEND_BUFFER_FULL;
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return AVA_SEND_BUFFER_EMPTY;
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}
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static inline int avalon_gets(int fd, uint8_t *buf, struct thr_info *thr,
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struct timeval *tv_finish)
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{
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int read_amount = AVALON_READ_SIZE;
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bool first = true;
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ssize_t ret = 0;
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while (true) {
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struct timeval timeout;
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fd_set rd;
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if (unlikely(thr->work_restart)) {
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applog(LOG_DEBUG, "Avalon: Work restart");
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return AVA_GETS_RESTART;
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}
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timeout.tv_sec = 0;
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timeout.tv_usec = 100000;
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FD_ZERO(&rd);
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FD_SET(fd, &rd);
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ret = select(fd + 1, &rd, NULL, NULL, &timeout);
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if (unlikely(ret < 0)) {
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applog(LOG_ERR, "Avalon: Error %d on select in avalon_gets", errno);
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return AVA_GETS_ERROR;
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}
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if (ret) {
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ret = read(fd, buf, read_amount);
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if (unlikely(ret < 0)) {
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applog(LOG_ERR, "Avalon: Error %d on read in avalon_gets", errno);
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return AVA_GETS_ERROR;
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}
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if (likely(first)) {
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gettimeofday(tv_finish, NULL);
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first = false;
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}
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if (likely(ret >= read_amount))
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return AVA_GETS_OK;
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buf += ret;
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read_amount -= ret;
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continue;
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}
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if (unlikely(thr->work_restart)) {
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applog(LOG_DEBUG, "Avalon: Work restart");
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return AVA_GETS_RESTART;
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}
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return AVA_GETS_TIMEOUT;
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}
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}
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static int avalon_get_result(int fd, struct avalon_result *ar,
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struct thr_info *thr, struct timeval *tv_finish)
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{
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uint8_t result[AVALON_READ_SIZE];
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int ret;
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memset(result, 0, AVALON_READ_SIZE);
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ret = avalon_gets(fd, result, thr, tv_finish);
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if (ret == AVA_GETS_OK) {
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if (opt_debug) {
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applog(LOG_DEBUG, "Avalon: get:");
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hexdump((uint8_t *)result, AVALON_READ_SIZE);
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}
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memcpy((uint8_t *)ar, result, AVALON_READ_SIZE);
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}
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return ret;
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}
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static bool avalon_decode_nonce(struct thr_info *thr, struct avalon_result *ar,
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uint32_t *nonce)
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{
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struct cgpu_info *avalon;
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struct avalon_info *info;
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struct work *work;
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avalon = thr->cgpu;
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if (unlikely(!avalon->works))
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return false;
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work = find_queued_work_bymidstate(avalon, (char *)ar->midstate, 32,
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(char *)ar->data, 64, 12);
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if (!work)
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return false;
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info = avalon_infos[avalon->device_id];
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info->matching_work++;
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*nonce = htole32(ar->nonce);
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submit_nonce(thr, work, *nonce);
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return true;
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}
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static void avalon_get_reset(int fd, struct avalon_result *ar)
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{
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int read_amount = AVALON_READ_SIZE;
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uint8_t result[AVALON_READ_SIZE];
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struct timeval timeout = {1, 0};
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ssize_t ret = 0, offset = 0;
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fd_set rd;
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memset(result, 0, AVALON_READ_SIZE);
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memset(ar, 0, AVALON_READ_SIZE);
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FD_ZERO(&rd);
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FD_SET(fd, &rd);
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ret = select(fd + 1, &rd, NULL, NULL, &timeout);
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if (unlikely(ret < 0)) {
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applog(LOG_WARNING, "Avalon: Error %d on select in avalon_get_reset", errno);
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return;
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}
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if (!ret) {
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applog(LOG_WARNING, "Avalon: Timeout on select in avalon_get_reset");
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return;
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}
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do {
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ret = read(fd, result + offset, read_amount);
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if (unlikely(ret < 0)) {
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applog(LOG_WARNING, "Avalon: Error %d on read in avalon_get_reset", errno);
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return;
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}
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read_amount -= ret;
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offset += ret;
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} while (read_amount > 0);
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if (opt_debug) {
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applog(LOG_DEBUG, "Avalon: get:");
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hexdump((uint8_t *)result, AVALON_READ_SIZE);
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}
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memcpy((uint8_t *)ar, result, AVALON_READ_SIZE);
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}
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static int avalon_reset(int fd, struct avalon_result *ar)
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{
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struct avalon_task at;
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uint8_t *buf;
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int ret, i = 0;
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struct timespec p;
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avalon_init_task(&at, 1, 0,
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AVALON_DEFAULT_FAN_MAX_PWM,
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AVALON_DEFAULT_TIMEOUT,
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AVALON_DEFAULT_ASIC_NUM,
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AVALON_DEFAULT_MINER_NUM,
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0, 0,
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AVALON_DEFAULT_FREQUENCY);
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ret = avalon_send_task(fd, &at, NULL);
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if (ret == AVA_SEND_ERROR)
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return 1;
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avalon_get_reset(fd, ar);
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buf = (uint8_t *)ar;
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/* Sometimes there is one extra 0 byte for some reason in the buffer,
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* so work around it. */
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if (buf[0] == 0)
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buf = (uint8_t *)(ar + 1);
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if (buf[0] == 0xAA && buf[1] == 0x55 &&
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buf[2] == 0xAA && buf[3] == 0x55) {
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for (i = 4; i < 11; i++)
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if (buf[i] != 0)
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break;
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}
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|
|
p.tv_sec = 0;
|
|
|
|
p.tv_nsec = AVALON_RESET_PITCH;
|
|
|
|
nanosleep(&p, NULL);
|
|
|
|
|
|
|
|
if (i != 11) {
|
|
|
|
applog(LOG_ERR, "Avalon: Reset failed! not an Avalon?"
|
|
|
|
" (%d: %02x %02x %02x %02x)",
|
|
|
|
i, buf[0], buf[1], buf[2], buf[3]);
|
|
|
|
/* FIXME: return 1; */
|
|
|
|
} else
|
|
|
|
applog(LOG_WARNING, "Avalon: Reset succeeded");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void avalon_idle(struct cgpu_info *avalon)
|
|
|
|
{
|
|
|
|
int i, ret;
|
|
|
|
struct avalon_task at;
|
|
|
|
|
|
|
|
int fd = avalon->device_fd;
|
|
|
|
struct avalon_info *info = avalon_infos[avalon->device_id];
|
|
|
|
int avalon_get_work_count = info->miner_count;
|
|
|
|
|
|
|
|
i = 0;
|
|
|
|
while (true) {
|
|
|
|
avalon_init_task(&at, 0, 0, info->fan_pwm,
|
|
|
|
info->timeout, info->asic_count,
|
|
|
|
info->miner_count, 1, 1, info->frequency);
|
|
|
|
ret = avalon_send_task(fd, &at, avalon);
|
|
|
|
if (unlikely(ret == AVA_SEND_ERROR ||
|
|
|
|
(ret == AVA_SEND_BUFFER_EMPTY &&
|
|
|
|
(i + 1 == avalon_get_work_count * 2)))) {
|
|
|
|
applog(LOG_ERR, "AVA%i: Comms error", avalon->device_id);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (i + 1 == avalon_get_work_count * 2)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (ret == AVA_SEND_BUFFER_FULL)
|
|
|
|
break;
|
|
|
|
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
applog(LOG_ERR, "Avalon: Goto idle mode");
|
|
|
|
}
|
|
|
|
|
|
|
|
static void get_options(int this_option_offset, int *baud, int *miner_count,
|
|
|
|
int *asic_count, int *timeout, int *frequency)
|
|
|
|
{
|
|
|
|
char err_buf[BUFSIZ+1];
|
|
|
|
char buf[BUFSIZ+1];
|
|
|
|
char *ptr, *comma, *colon, *colon2, *colon3, *colon4;
|
|
|
|
size_t max;
|
|
|
|
int i, tmp;
|
|
|
|
|
|
|
|
if (opt_avalon_options == NULL)
|
|
|
|
buf[0] = '\0';
|
|
|
|
else {
|
|
|
|
ptr = opt_avalon_options;
|
|
|
|
for (i = 0; i < this_option_offset; i++) {
|
|
|
|
comma = strchr(ptr, ',');
|
|
|
|
if (comma == NULL)
|
|
|
|
break;
|
|
|
|
ptr = comma + 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
comma = strchr(ptr, ',');
|
|
|
|
if (comma == NULL)
|
|
|
|
max = strlen(ptr);
|
|
|
|
else
|
|
|
|
max = comma - ptr;
|
|
|
|
|
|
|
|
if (max > BUFSIZ)
|
|
|
|
max = BUFSIZ;
|
|
|
|
strncpy(buf, ptr, max);
|
|
|
|
buf[max] = '\0';
|
|
|
|
}
|
|
|
|
|
|
|
|
*baud = AVALON_IO_SPEED;
|
|
|
|
*miner_count = AVALON_DEFAULT_MINER_NUM - 8;
|
|
|
|
*asic_count = AVALON_DEFAULT_ASIC_NUM;
|
|
|
|
*timeout = AVALON_DEFAULT_TIMEOUT;
|
|
|
|
*frequency = AVALON_DEFAULT_FREQUENCY;
|
|
|
|
|
|
|
|
if (!(*buf))
|
|
|
|
return;
|
|
|
|
|
|
|
|
colon = strchr(buf, ':');
|
|
|
|
if (colon)
|
|
|
|
*(colon++) = '\0';
|
|
|
|
|
|
|
|
tmp = atoi(buf);
|
|
|
|
switch (tmp) {
|
|
|
|
case 115200:
|
|
|
|
*baud = 115200;
|
|
|
|
break;
|
|
|
|
case 57600:
|
|
|
|
*baud = 57600;
|
|
|
|
break;
|
|
|
|
case 38400:
|
|
|
|
*baud = 38400;
|
|
|
|
break;
|
|
|
|
case 19200:
|
|
|
|
*baud = 19200;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
sprintf(err_buf,
|
|
|
|
"Invalid avalon-options for baud (%s) "
|
|
|
|
"must be 115200, 57600, 38400 or 19200", buf);
|
|
|
|
quit(1, err_buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (colon && *colon) {
|
|
|
|
colon2 = strchr(colon, ':');
|
|
|
|
if (colon2)
|
|
|
|
*(colon2++) = '\0';
|
|
|
|
|
|
|
|
if (*colon) {
|
|
|
|
tmp = atoi(colon);
|
|
|
|
if (tmp > 0 && tmp <= AVALON_DEFAULT_MINER_NUM) {
|
|
|
|
*miner_count = tmp;
|
|
|
|
} else {
|
|
|
|
sprintf(err_buf,
|
|
|
|
"Invalid avalon-options for "
|
|
|
|
"miner_count (%s) must be 1 ~ %d",
|
|
|
|
colon, AVALON_DEFAULT_MINER_NUM);
|
|
|
|
quit(1, err_buf);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (colon2 && *colon2) {
|
|
|
|
colon3 = strchr(colon2, ':');
|
|
|
|
if (colon3)
|
|
|
|
*(colon3++) = '\0';
|
|
|
|
|
|
|
|
tmp = atoi(colon2);
|
|
|
|
if (tmp > 0 && tmp <= AVALON_DEFAULT_ASIC_NUM)
|
|
|
|
*asic_count = tmp;
|
|
|
|
else {
|
|
|
|
sprintf(err_buf,
|
|
|
|
"Invalid avalon-options for "
|
|
|
|
"asic_count (%s) must be 1 ~ %d",
|
|
|
|
colon2, AVALON_DEFAULT_ASIC_NUM);
|
|
|
|
quit(1, err_buf);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (colon3 && *colon3) {
|
|
|
|
colon4 = strchr(colon3, ':');
|
|
|
|
if (colon4)
|
|
|
|
*(colon4++) = '\0';
|
|
|
|
|
|
|
|
tmp = atoi(colon3);
|
|
|
|
if (tmp > 0 && tmp <= 0xff)
|
|
|
|
*timeout = tmp;
|
|
|
|
else {
|
|
|
|
sprintf(err_buf,
|
|
|
|
"Invalid avalon-options for "
|
|
|
|
"timeout (%s) must be 1 ~ %d",
|
|
|
|
colon3, 0xff);
|
|
|
|
quit(1, err_buf);
|
|
|
|
}
|
|
|
|
if (colon4 && *colon4) {
|
|
|
|
tmp = atoi(colon4);
|
|
|
|
switch (tmp) {
|
|
|
|
case 256:
|
|
|
|
case 270:
|
|
|
|
case 282:
|
|
|
|
case 300:
|
|
|
|
*frequency = tmp;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
sprintf(err_buf,
|
|
|
|
"Invalid avalon-options for "
|
|
|
|
"frequency must be 256/270/282/300");
|
|
|
|
quit(1, err_buf);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool avalon_detect_one(const char *devpath)
|
|
|
|
{
|
|
|
|
struct avalon_info *info;
|
|
|
|
struct avalon_result ar;
|
|
|
|
int fd, ret;
|
|
|
|
int baud, miner_count, asic_count, timeout, frequency = 0;
|
|
|
|
struct cgpu_info *avalon;
|
|
|
|
|
|
|
|
int this_option_offset = ++option_offset;
|
|
|
|
get_options(this_option_offset, &baud, &miner_count, &asic_count,
|
|
|
|
&timeout, &frequency);
|
|
|
|
|
|
|
|
applog(LOG_DEBUG, "Avalon Detect: Attempting to open %s "
|
|
|
|
"(baud=%d miner_count=%d asic_count=%d timeout=%d frequency=%d)",
|
|
|
|
devpath, baud, miner_count, asic_count, timeout, frequency);
|
|
|
|
|
|
|
|
fd = avalon_open2(devpath, baud, true);
|
|
|
|
if (unlikely(fd == -1)) {
|
|
|
|
applog(LOG_ERR, "Avalon Detect: Failed to open %s", devpath);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We have a real Avalon! */
|
|
|
|
avalon = calloc(1, sizeof(struct cgpu_info));
|
|
|
|
avalon->drv = &avalon_drv;
|
|
|
|
avalon->device_path = strdup(devpath);
|
|
|
|
avalon->device_fd = fd;
|
|
|
|
avalon->threads = AVALON_MINER_THREADS;
|
|
|
|
add_cgpu(avalon);
|
|
|
|
|
|
|
|
ret = avalon_reset(fd, &ar);
|
|
|
|
if (ret) {
|
|
|
|
; /* FIXME: I think IT IS avalon and wait on reset;
|
|
|
|
* avalon_close(fd);
|
|
|
|
* return false; */
|
|
|
|
}
|
|
|
|
|
|
|
|
avalon_infos = realloc(avalon_infos,
|
|
|
|
sizeof(struct avalon_info *) *
|
|
|
|
(total_devices + 1));
|
|
|
|
|
|
|
|
applog(LOG_INFO, "Avalon Detect: Found at %s, mark as %d",
|
|
|
|
devpath, avalon->device_id);
|
|
|
|
|
|
|
|
avalon_infos[avalon->device_id] = (struct avalon_info *)
|
|
|
|
malloc(sizeof(struct avalon_info));
|
|
|
|
if (unlikely(!(avalon_infos[avalon->device_id])))
|
|
|
|
quit(1, "Failed to malloc avalon_infos");
|
|
|
|
|
|
|
|
info = avalon_infos[avalon->device_id];
|
|
|
|
|
|
|
|
memset(info, 0, sizeof(struct avalon_info));
|
|
|
|
|
|
|
|
info->baud = baud;
|
|
|
|
info->miner_count = miner_count;
|
|
|
|
info->asic_count = asic_count;
|
|
|
|
info->timeout = timeout;
|
|
|
|
|
|
|
|
info->fan_pwm = AVALON_DEFAULT_FAN_MIN_PWM;
|
|
|
|
info->temp_max = 0;
|
|
|
|
/* This is for check the temp/fan every 3~4s */
|
|
|
|
info->temp_history_count = (4 / (float)((float)info->timeout * ((float)1.67/0x32))) + 1;
|
|
|
|
if (info->temp_history_count <= 0)
|
|
|
|
info->temp_history_count = 1;
|
|
|
|
|
|
|
|
info->temp_history_index = 0;
|
|
|
|
info->temp_sum = 0;
|
|
|
|
info->temp_old = 0;
|
|
|
|
info->frequency = frequency;
|
|
|
|
|
|
|
|
/* Do something for failed reset ? */
|
|
|
|
if (0) {
|
|
|
|
/* Set asic to idle mode after detect */
|
|
|
|
avalon_idle(avalon);
|
|
|
|
avalon->device_fd = -1;
|
|
|
|
|
|
|
|
avalon_close(fd);
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void avalon_detect()
|
|
|
|
{
|
|
|
|
serial_detect(&avalon_drv, avalon_detect_one);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __avalon_init(struct cgpu_info *avalon)
|
|
|
|
{
|
|
|
|
applog(LOG_INFO, "Avalon: Opened on %s", avalon->device_path);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void avalon_init(struct cgpu_info *avalon)
|
|
|
|
{
|
|
|
|
struct avalon_result ar;
|
|
|
|
int fd, ret;
|
|
|
|
|
|
|
|
avalon->device_fd = -1;
|
|
|
|
fd = avalon_open(avalon->device_path,
|
|
|
|
avalon_infos[avalon->device_id]->baud);
|
|
|
|
if (unlikely(fd == -1)) {
|
|
|
|
applog(LOG_ERR, "Avalon: Failed to open on %s",
|
|
|
|
avalon->device_path);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = avalon_reset(fd, &ar);
|
|
|
|
if (ret) {
|
|
|
|
avalon_close(fd);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
avalon->device_fd = fd;
|
|
|
|
__avalon_init(avalon);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool avalon_prepare(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
struct cgpu_info *avalon = thr->cgpu;
|
|
|
|
struct avalon_info *info = avalon_infos[avalon->device_id];
|
|
|
|
struct timeval now;
|
|
|
|
|
|
|
|
free(avalon->works);
|
|
|
|
avalon->works = calloc(info->miner_count * sizeof(struct work *), 4);
|
|
|
|
if (!avalon->works)
|
|
|
|
quit(1, "Failed to calloc avalon works in avalon_prepare");
|
|
|
|
if (avalon->device_fd == -1)
|
|
|
|
avalon_init(avalon);
|
|
|
|
else
|
|
|
|
__avalon_init(avalon);
|
|
|
|
|
|
|
|
gettimeofday(&now, NULL);
|
|
|
|
get_datestamp(avalon->init, &now);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void avalon_free_work(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
struct cgpu_info *avalon;
|
|
|
|
struct avalon_info *info;
|
|
|
|
struct work **works;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
avalon = thr->cgpu;
|
|
|
|
avalon->queued = 0;
|
|
|
|
if (unlikely(!avalon->works))
|
|
|
|
return;
|
|
|
|
works = avalon->works;
|
|
|
|
info = avalon_infos[avalon->device_id];
|
|
|
|
|
|
|
|
for (i = 0; i < info->miner_count * 4; i++) {
|
|
|
|
if (works[i]) {
|
|
|
|
work_completed(avalon, works[i]);
|
|
|
|
works[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void avalon_free_work_array(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
struct cgpu_info *avalon;
|
|
|
|
struct work **works;
|
|
|
|
int i, j, mc;
|
|
|
|
|
|
|
|
avalon = thr->cgpu;
|
|
|
|
avalon->queued = 0;
|
|
|
|
if (unlikely(!avalon->works))
|
|
|
|
return;
|
|
|
|
works = avalon->works;
|
|
|
|
mc = avalon_infos[avalon->device_id]->miner_count;
|
|
|
|
if (++avalon->work_array > 3)
|
|
|
|
avalon->work_array = 0;
|
|
|
|
|
|
|
|
for (i = avalon->work_array * mc, j = 0; j < mc; i++, j++) {
|
|
|
|
if (likely(works[i])) {
|
|
|
|
work_completed(avalon, works[i]);
|
|
|
|
works[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void do_avalon_close(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
struct avalon_result ar;
|
|
|
|
struct cgpu_info *avalon = thr->cgpu;
|
|
|
|
struct avalon_info *info = avalon_infos[avalon->device_id];
|
|
|
|
|
|
|
|
avalon_free_work(thr);
|
|
|
|
sleep(1);
|
|
|
|
avalon_reset(avalon->device_fd, &ar);
|
|
|
|
avalon_idle(avalon);
|
|
|
|
avalon_close(avalon->device_fd);
|
|
|
|
avalon->device_fd = -1;
|
|
|
|
|
|
|
|
info->no_matching_work = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void record_temp_fan(struct avalon_info *info, struct avalon_result *ar, float *temp_avg)
|
|
|
|
{
|
|
|
|
info->fan0 = ar->fan0 * AVALON_FAN_FACTOR;
|
|
|
|
info->fan1 = ar->fan1 * AVALON_FAN_FACTOR;
|
|
|
|
info->fan2 = ar->fan2 * AVALON_FAN_FACTOR;
|
|
|
|
|
|
|
|
info->temp0 = ar->temp0;
|
|
|
|
info->temp1 = ar->temp1;
|
|
|
|
info->temp2 = ar->temp2;
|
|
|
|
if (ar->temp0 & 0x80) {
|
|
|
|
ar->temp0 &= 0x7f;
|
|
|
|
info->temp0 = 0 - ((~ar->temp0 & 0x7f) + 1);
|
|
|
|
}
|
|
|
|
if (ar->temp1 & 0x80) {
|
|
|
|
ar->temp1 &= 0x7f;
|
|
|
|
info->temp1 = 0 - ((~ar->temp1 & 0x7f) + 1);
|
|
|
|
}
|
|
|
|
if (ar->temp2 & 0x80) {
|
|
|
|
ar->temp2 &= 0x7f;
|
|
|
|
info->temp2 = 0 - ((~ar->temp2 & 0x7f) + 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
*temp_avg = info->temp2;
|
|
|
|
|
|
|
|
if (info->temp0 > info->temp_max)
|
|
|
|
info->temp_max = info->temp0;
|
|
|
|
if (info->temp1 > info->temp_max)
|
|
|
|
info->temp_max = info->temp1;
|
|
|
|
if (info->temp2 > info->temp_max)
|
|
|
|
info->temp_max = info->temp2;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void adjust_fan(struct avalon_info *info)
|
|
|
|
{
|
|
|
|
int temp_new;
|
|
|
|
|
|
|
|
temp_new = info->temp_sum / info->temp_history_count;
|
|
|
|
|
|
|
|
if (temp_new < 35) {
|
|
|
|
info->fan_pwm = AVALON_DEFAULT_FAN_MIN_PWM;
|
|
|
|
info->temp_old = temp_new;
|
|
|
|
} else if (temp_new > 55) {
|
|
|
|
info->fan_pwm = AVALON_DEFAULT_FAN_MAX_PWM;
|
|
|
|
info->temp_old = temp_new;
|
|
|
|
} else if (abs(temp_new - info->temp_old) >= 2) {
|
|
|
|
info->fan_pwm = AVALON_DEFAULT_FAN_MIN_PWM + (temp_new - 35) * 6.4;
|
|
|
|
info->temp_old = temp_new;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool avalon_fill(struct cgpu_info *avalon)
|
|
|
|
{
|
|
|
|
int subid, mc = avalon_infos[avalon->device_id]->miner_count;
|
|
|
|
struct work *work;
|
|
|
|
|
|
|
|
if (avalon->queued >= mc)
|
|
|
|
return true;
|
|
|
|
work = get_queued(avalon);
|
|
|
|
if (unlikely(!work))
|
|
|
|
return false;
|
|
|
|
subid = avalon->queued++;
|
|
|
|
work->subid = subid;
|
|
|
|
avalon->works[avalon->work_array * mc + subid] = work;
|
|
|
|
if (avalon->queued >= mc)
|
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int64_t avalon_scanhash(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
struct cgpu_info *avalon;
|
|
|
|
struct work **works;
|
|
|
|
int fd, ret = AVA_GETS_OK, full;
|
|
|
|
|
|
|
|
struct avalon_info *info;
|
|
|
|
struct avalon_task at;
|
|
|
|
struct avalon_result ar;
|
|
|
|
int i;
|
|
|
|
int avalon_get_work_count;
|
|
|
|
int start_count, end_count;
|
|
|
|
|
|
|
|
struct timeval tv_start, tv_finish, elapsed;
|
|
|
|
uint32_t nonce;
|
|
|
|
int64_t hash_count;
|
|
|
|
static int first_try = 0;
|
|
|
|
int result_wrong;
|
|
|
|
|
|
|
|
avalon = thr->cgpu;
|
|
|
|
works = avalon->works;
|
|
|
|
info = avalon_infos[avalon->device_id];
|
|
|
|
avalon_get_work_count = info->miner_count;
|
|
|
|
|
|
|
|
if (unlikely(avalon->device_fd == -1)) {
|
|
|
|
if (!avalon_prepare(thr)) {
|
|
|
|
applog(LOG_ERR, "AVA%i: Comms error(open)",
|
|
|
|
avalon->device_id);
|
|
|
|
dev_error(avalon, REASON_DEV_COMMS_ERROR);
|
|
|
|
/* fail the device if the reopen attempt fails */
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
fd = avalon->device_fd;
|
|
|
|
#ifndef WIN32
|
|
|
|
tcflush(fd, TCOFLUSH);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
start_count = avalon->work_array * avalon_get_work_count;
|
|
|
|
end_count = start_count + avalon_get_work_count;
|
|
|
|
i = start_count;
|
|
|
|
while (true) {
|
|
|
|
avalon_init_task(&at, 0, 0, info->fan_pwm,
|
|
|
|
info->timeout, info->asic_count,
|
|
|
|
info->miner_count, 1, 0, info->frequency);
|
|
|
|
avalon_create_task(&at, works[i]);
|
|
|
|
ret = avalon_send_task(fd, &at, avalon);
|
|
|
|
if (unlikely(ret == AVA_SEND_ERROR ||
|
|
|
|
(ret == AVA_SEND_BUFFER_EMPTY &&
|
|
|
|
(i + 1 == end_count) &&
|
|
|
|
first_try))) {
|
|
|
|
do_avalon_close(thr);
|
|
|
|
applog(LOG_ERR, "AVA%i: Comms error(buffer)",
|
|
|
|
avalon->device_id);
|
|
|
|
dev_error(avalon, REASON_DEV_COMMS_ERROR);
|
|
|
|
first_try = 0;
|
|
|
|
sleep(1);
|
|
|
|
avalon_init(avalon);
|
|
|
|
return 0; /* This should never happen */
|
|
|
|
}
|
|
|
|
if (ret == AVA_SEND_BUFFER_EMPTY && (i + 1 == end_count)) {
|
|
|
|
first_try = 1;
|
|
|
|
avalon_free_work_array(thr);
|
|
|
|
return 0xffffffff;
|
|
|
|
}
|
|
|
|
|
|
|
|
works[i]->blk.nonce = 0xffffffff;
|
|
|
|
|
|
|
|
if (ret == AVA_SEND_BUFFER_FULL)
|
|
|
|
break;
|
|
|
|
|
|
|
|
i++;
|
|
|
|
}
|
|
|
|
if (unlikely(first_try))
|
|
|
|
first_try = 0;
|
|
|
|
|
|
|
|
elapsed.tv_sec = elapsed.tv_usec = 0;
|
|
|
|
gettimeofday(&tv_start, NULL);
|
|
|
|
|
|
|
|
result_wrong = 0;
|
|
|
|
hash_count = 0;
|
|
|
|
while (true) {
|
|
|
|
full = avalon_buffer_full(fd);
|
|
|
|
applog(LOG_DEBUG, "Avalon: Buffer full: %s",
|
|
|
|
((full == AVA_BUFFER_FULL) ? "Yes" : "No"));
|
|
|
|
if (unlikely(full == AVA_BUFFER_EMPTY))
|
|
|
|
break;
|
|
|
|
|
|
|
|
ret = avalon_get_result(fd, &ar, thr, &tv_finish);
|
|
|
|
if (unlikely(ret == AVA_GETS_ERROR)) {
|
|
|
|
do_avalon_close(thr);
|
|
|
|
applog(LOG_ERR,
|
|
|
|
"AVA%i: Comms error(read)", avalon->device_id);
|
|
|
|
dev_error(avalon, REASON_DEV_COMMS_ERROR);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (unlikely(ret == AVA_GETS_RESTART))
|
|
|
|
break;
|
|
|
|
if (unlikely(ret == AVA_GETS_TIMEOUT)) {
|
|
|
|
timersub(&tv_finish, &tv_start, &elapsed);
|
|
|
|
applog(LOG_DEBUG, "Avalon: no nonce in (%ld.%06lds)",
|
|
|
|
elapsed.tv_sec, elapsed.tv_usec);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!avalon_decode_nonce(thr, &ar, &nonce)) {
|
|
|
|
info->no_matching_work++;
|
|
|
|
result_wrong++;
|
|
|
|
|
|
|
|
if (opt_debug) {
|
|
|
|
timersub(&tv_finish, &tv_start, &elapsed);
|
|
|
|
applog(LOG_DEBUG,"Avalon: no matching work: %d"
|
|
|
|
" (%ld.%06lds)", info->no_matching_work,
|
|
|
|
elapsed.tv_sec, elapsed.tv_usec);
|
|
|
|
}
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
hash_count += 0xffffffff;
|
|
|
|
if (opt_debug) {
|
|
|
|
timersub(&tv_finish, &tv_start, &elapsed);
|
|
|
|
applog(LOG_DEBUG,
|
|
|
|
"Avalon: nonce = 0x%08x = 0x%08llx hashes "
|
|
|
|
"(%ld.%06lds)", nonce, hash_count,
|
|
|
|
elapsed.tv_sec, elapsed.tv_usec);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (result_wrong >= avalon_get_work_count) {
|
|
|
|
/* This means FPGA controller gave all wrong results, so
|
|
|
|
* try to reset the Avalon */
|
|
|
|
do_avalon_close(thr);
|
|
|
|
applog(LOG_ERR,
|
|
|
|
"AVA%i: FPGA controller mess up, %d wrong results", avalon->device_id, result_wrong);
|
|
|
|
dev_error(avalon, REASON_DEV_COMMS_ERROR);
|
|
|
|
sleep(1);
|
|
|
|
avalon_init(avalon);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
avalon_free_work_array(thr);
|
|
|
|
|
|
|
|
record_temp_fan(info, &ar, &(avalon->temp));
|
|
|
|
applog(LOG_INFO,
|
|
|
|
"Avalon: Fan1: %d/m, Fan2: %d/m, Fan3: %d/m\t"
|
|
|
|
"Temp1: %dC, Temp2: %dC, Temp3: %dC, TempMAX: %dC",
|
|
|
|
info->fan0, info->fan1, info->fan2,
|
|
|
|
info->temp0, info->temp1, info->temp2, info->temp_max);
|
|
|
|
info->temp_history_index++;
|
|
|
|
info->temp_sum += info->temp2;
|
|
|
|
applog(LOG_DEBUG, "Avalon: temp_index: %d, temp_count: %d, temp_old: %d",
|
|
|
|
info->temp_history_index, info->temp_history_count, info->temp_old);
|
|
|
|
if (info->temp_history_index == info->temp_history_count) {
|
|
|
|
adjust_fan(info);
|
|
|
|
info->temp_history_index = 0;
|
|
|
|
info->temp_sum = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This hashmeter is just a utility counter based on returned shares */
|
|
|
|
return hash_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct api_data *avalon_api_stats(struct cgpu_info *cgpu)
|
|
|
|
{
|
|
|
|
struct api_data *root = NULL;
|
|
|
|
struct avalon_info *info = avalon_infos[cgpu->device_id];
|
|
|
|
|
|
|
|
root = api_add_int(root, "baud", &(info->baud), false);
|
|
|
|
root = api_add_int(root, "miner_count", &(info->miner_count),false);
|
|
|
|
root = api_add_int(root, "asic_count", &(info->asic_count), false);
|
|
|
|
root = api_add_int(root, "timeout", &(info->timeout), false);
|
|
|
|
root = api_add_int(root, "frequency", &(info->frequency), false);
|
|
|
|
|
|
|
|
root = api_add_int(root, "fan1", &(info->fan0), false);
|
|
|
|
root = api_add_int(root, "fan2", &(info->fan1), false);
|
|
|
|
root = api_add_int(root, "fan3", &(info->fan2), false);
|
|
|
|
|
|
|
|
root = api_add_int(root, "temp1", &(info->temp0), false);
|
|
|
|
root = api_add_int(root, "temp2", &(info->temp1), false);
|
|
|
|
root = api_add_int(root, "temp3", &(info->temp2), false);
|
|
|
|
root = api_add_int(root, "temp_max", &(info->temp_max), false);
|
|
|
|
|
|
|
|
root = api_add_int(root, "no_matching_work", &(info->no_matching_work), false);
|
|
|
|
root = api_add_int(root, "matching_work_count", &(info->matching_work), false);
|
|
|
|
|
|
|
|
return root;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void avalon_shutdown(struct thr_info *thr)
|
|
|
|
{
|
|
|
|
do_avalon_close(thr);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct device_drv avalon_drv = {
|
|
|
|
.dname = "avalon",
|
|
|
|
.name = "AVA",
|
|
|
|
.drv_detect = avalon_detect,
|
|
|
|
.thread_prepare = avalon_prepare,
|
|
|
|
.hash_work = hash_queued_work,
|
|
|
|
.queue_full = avalon_fill,
|
|
|
|
.scanwork = avalon_scanhash,
|
|
|
|
.get_api_stats = avalon_api_stats,
|
|
|
|
.reinit_device = avalon_init,
|
|
|
|
.thread_shutdown = avalon_shutdown,
|
|
|
|
};
|