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360 lines
10 KiB
360 lines
10 KiB
// Auf Myriadcoin spezialisierte Version von Groestl inkl. Bitslice |
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#include <stdio.h> |
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#include <memory.h> |
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#include "cuda_helper.h" |
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#ifdef __INTELLISENSE__ |
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#define __CUDA_ARCH__ 500 |
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#define __funnelshift_r(x,y,n) (x >> n) |
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#define atomicExch(p,x) x |
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#endif |
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#if __CUDA_ARCH__ >= 300 |
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// 64 Registers Variant for Compute 3.0 |
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#include "quark/groestl_functions_quad.h" |
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#include "quark/groestl_transf_quad.h" |
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#endif |
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// globaler Speicher für alle HeftyHashes aller Threads |
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static uint32_t *d_outputHashes[MAX_GPUS]; |
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static uint32_t *d_resultNonces[MAX_GPUS]; |
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__constant__ uint32_t pTarget[2]; // Same for all GPU |
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__constant__ uint32_t myriadgroestl_gpu_msg[32]; |
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// muss expandiert werden |
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__constant__ uint32_t myr_sha256_gpu_constantTable[64]; |
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__constant__ uint32_t myr_sha256_gpu_constantTable2[64]; |
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const uint32_t myr_sha256_cpu_constantTable[] = { |
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0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, |
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0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, |
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0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, |
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0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, |
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0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, |
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0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, |
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0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, |
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0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2, |
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}; |
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const uint32_t myr_sha256_cpu_w2Table[] = { |
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0x80000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, |
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0x80000000, 0x01400000, 0x00205000, 0x00005088, 0x22000800, 0x22550014, 0x05089742, 0xa0000020, |
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0x5a880000, 0x005c9400, 0x0016d49d, 0xfa801f00, 0xd33225d0, 0x11675959, 0xf6e6bfda, 0xb30c1549, |
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0x08b2b050, 0x9d7c4c27, 0x0ce2a393, 0x88e6e1ea, 0xa52b4335, 0x67a16f49, 0xd732016f, 0x4eeb2e91, |
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0x5dbf55e5, 0x8eee2335, 0xe2bc5ec2, 0xa83f4394, 0x45ad78f7, 0x36f3d0cd, 0xd99c05e8, 0xb0511dc7, |
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0x69bc7ac4, 0xbd11375b, 0xe3ba71e5, 0x3b209ff2, 0x18feee17, 0xe25ad9e7, 0x13375046, 0x0515089d, |
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0x4f0d0f04, 0x2627484e, 0x310128d2, 0xc668b434, 0x420841cc, 0x62d311b8, 0xe59ba771, 0x85a7a484 |
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}; |
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#define SWAB32(x) cuda_swab32(x) |
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#if __CUDA_ARCH__ < 320 |
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// Kepler (Compute 3.0) |
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#define ROTR32(x, n) (((x) >> (n)) | ((x) << (32 - (n)))) |
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#else |
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// Kepler (Compute 3.5) |
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#define ROTR32(x, n) __funnelshift_r( (x), (x), (n) ) |
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#endif |
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#define R(x, n) ((x) >> (n)) |
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#define Ch(x, y, z) ((x & (y ^ z)) ^ z) |
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#define Maj(x, y, z) ((x & (y | z)) | (y & z)) |
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#define S0(x) (ROTR32(x, 2) ^ ROTR32(x, 13) ^ ROTR32(x, 22)) |
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#define S1(x) (ROTR32(x, 6) ^ ROTR32(x, 11) ^ ROTR32(x, 25)) |
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#define s0(x) (ROTR32(x, 7) ^ ROTR32(x, 18) ^ R(x, 3)) |
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#define s1(x) (ROTR32(x, 17) ^ ROTR32(x, 19) ^ R(x, 10)) |
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__device__ __forceinline__ |
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void myriadgroestl_gpu_sha256(uint32_t *message) |
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{ |
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uint32_t W1[16]; |
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#pragma unroll |
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for(int k=0; k<16; k++) |
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W1[k] = SWAB32(message[k]); |
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uint32_t regs[8] = { |
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0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, |
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0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19 |
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}; |
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// Progress W1 |
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#pragma unroll |
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for(int j=0; j<16; j++) |
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{ |
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j] + W1[j]; |
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]); |
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#pragma unroll 7 |
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for (int k=6; k >= 0; k--) regs[k+1] = regs[k]; |
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regs[0] = T1 + T2; |
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regs[4] += T1; |
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} |
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// Progress W2...W3 |
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uint32_t W2[16]; |
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////// PART 1 |
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#pragma unroll |
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for(int j=0; j<2; j++) |
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W2[j] = s1(W1[14+j]) + W1[9+j] + s0(W1[1+j]) + W1[j]; |
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#pragma unroll 5 |
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for(int j=2; j<7;j++) |
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W2[j] = s1(W2[j-2]) + W1[9+j] + s0(W1[1+j]) + W1[j]; |
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#pragma unroll |
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for(int j=7; j<15; j++) |
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W2[j] = s1(W2[j-2]) + W2[j-7] + s0(W1[1+j]) + W1[j]; |
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W2[15] = s1(W2[13]) + W2[8] + s0(W2[0]) + W1[15]; |
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// Round function |
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#pragma unroll |
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for(int j=0; j<16; j++) |
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{ |
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 16] + W2[j]; |
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]); |
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#pragma unroll 7 |
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l]; |
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regs[0] = T1 + T2; |
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regs[4] += T1; |
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} |
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////// PART 2 |
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#pragma unroll |
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for(int j=0; j<2; j++) |
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W1[j] = s1(W2[14+j]) + W2[9+j] + s0(W2[1+j]) + W2[j]; |
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#pragma unroll 5 |
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for(int j=2; j<7; j++) |
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W1[j] = s1(W1[j-2]) + W2[9+j] + s0(W2[1+j]) + W2[j]; |
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#pragma unroll |
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for(int j=7; j<15; j++) |
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W1[j] = s1(W1[j-2]) + W1[j-7] + s0(W2[1+j]) + W2[j]; |
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W1[15] = s1(W1[13]) + W1[8] + s0(W1[0]) + W2[15]; |
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// Round function |
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#pragma unroll |
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for(int j=0; j<16; j++) |
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{ |
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 32] + W1[j]; |
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]); |
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#pragma unroll 7 |
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l]; |
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regs[0] = T1 + T2; |
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regs[4] += T1; |
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} |
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////// PART 3 |
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#pragma unroll |
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for(int j=0; j<2; j++) |
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W2[j] = s1(W1[14+j]) + W1[9+j] + s0(W1[1+j]) + W1[j]; |
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#pragma unroll 5 |
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for(int j=2; j<7; j++) |
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W2[j] = s1(W2[j-2]) + W1[9+j] + s0(W1[1+j]) + W1[j]; |
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#pragma unroll |
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for(int j=7; j<15; j++) |
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W2[j] = s1(W2[j-2]) + W2[j-7] + s0(W1[1+j]) + W1[j]; |
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W2[15] = s1(W2[13]) + W2[8] + s0(W2[0]) + W1[15]; |
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// Round function |
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#pragma unroll |
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for(int j=0; j<16; j++) |
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{ |
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 48] + W2[j]; |
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]); |
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#pragma unroll 7 |
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l]; |
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regs[0] = T1 + T2; |
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regs[4] += T1; |
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} |
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uint32_t hash[8] = { |
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0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, |
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0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19 |
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}; |
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#pragma unroll 8 |
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for(int k=0; k<8; k++) |
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hash[k] += regs[k]; |
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///// |
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///// 2nd Round (wegen Msg-Padding) |
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///// |
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#pragma unroll |
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for(int k=0; k<8; k++) |
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regs[k] = hash[k]; |
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// Progress W1 |
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#pragma unroll |
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for(int j=0; j<64; j++) |
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{ |
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable2[j]; |
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]); |
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#pragma unroll 7 |
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for (int k=6; k >= 0; k--) regs[k+1] = regs[k]; |
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regs[0] = T1 + T2; |
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regs[4] += T1; |
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} |
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#if 0 |
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// Full sha hash |
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#pragma unroll |
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for(int k=0; k<8; k++) |
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hash[k] += regs[k]; |
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#pragma unroll |
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for(int k=0; k<8; k++) |
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message[k] = SWAB32(hash[k]); |
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#else |
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message[6] = SWAB32(hash[6] + regs[6]); |
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message[7] = SWAB32(hash[7] + regs[7]); |
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#endif |
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} |
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__global__ |
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//__launch_bounds__(256, 6) // we want <= 40 regs |
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void myriadgroestl_gpu_hash_sha(uint32_t threads, uint32_t startNounce, uint32_t *hashBuffer, uint32_t *resNonces) |
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{ |
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#if __CUDA_ARCH__ >= 300 |
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x); |
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if (thread < threads) |
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{ |
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const uint32_t nonce = startNounce + thread; |
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uint32_t out_state[16]; |
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uint32_t *inpHash = &hashBuffer[16 * thread]; |
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#pragma unroll 16 |
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for (int i=0; i < 16; i++) |
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out_state[i] = inpHash[i]; |
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myriadgroestl_gpu_sha256(out_state); |
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if (out_state[7] <= pTarget[1] && out_state[6] <= pTarget[0]) |
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{ |
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uint32_t tmp = atomicExch(&resNonces[0], nonce); |
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if (tmp != UINT32_MAX) |
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resNonces[1] = tmp; |
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} |
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} |
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#endif |
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} |
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__global__ |
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__launch_bounds__(256, 4) |
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void myriadgroestl_gpu_hash_quad(uint32_t threads, uint32_t startNounce, uint32_t *hashBuffer) |
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{ |
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#if __CUDA_ARCH__ >= 300 |
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// durch 4 dividieren, weil jeweils 4 Threads zusammen ein Hash berechnen |
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uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x) / 4; |
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if (thread < threads) |
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{ |
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// GROESTL |
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uint32_t paddedInput[8]; |
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#pragma unroll 8 |
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for(int k=0; k<8; k++) |
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paddedInput[k] = myriadgroestl_gpu_msg[4*k+threadIdx.x%4]; |
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uint32_t nounce = startNounce + thread; |
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if ((threadIdx.x % 4) == 3) |
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paddedInput[4] = SWAB32(nounce); // 4*4+3 = 19 |
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uint32_t msgBitsliced[8]; |
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to_bitslice_quad(paddedInput, msgBitsliced); |
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uint32_t state[8]; |
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groestl512_progressMessage_quad(state, msgBitsliced); |
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uint32_t out_state[16]; |
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from_bitslice_quad(state, out_state); |
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if ((threadIdx.x & 0x03) == 0) |
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{ |
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uint32_t *outpHash = &hashBuffer[16 * thread]; |
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#pragma unroll 16 |
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for(int k=0; k<16; k++) outpHash[k] = out_state[k]; |
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} |
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} |
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#endif |
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} |
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// Setup Function |
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__host__ |
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void myriadgroestl_cpu_init(int thr_id, uint32_t threads) |
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{ |
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uint32_t temp[64]; |
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for(int i=0; i<64; i++) |
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temp[i] = myr_sha256_cpu_w2Table[i] + myr_sha256_cpu_constantTable[i]; |
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cudaMemcpyToSymbol( myr_sha256_gpu_constantTable2, temp, sizeof(uint32_t) * 64 ); |
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cudaMemcpyToSymbol( myr_sha256_gpu_constantTable, |
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myr_sha256_cpu_constantTable, |
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sizeof(uint32_t) * 64 ); |
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// to check if the binary supports SM3+ |
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cuda_get_arch(thr_id); |
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cudaMalloc(&d_outputHashes[thr_id], (size_t) 64 * threads); |
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cudaMalloc(&d_resultNonces[thr_id], 2 * sizeof(uint32_t)); |
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} |
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__host__ |
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void myriadgroestl_cpu_free(int thr_id) |
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{ |
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cudaFree(d_outputHashes[thr_id]); |
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cudaFree(d_resultNonces[thr_id]); |
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} |
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__host__ |
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void myriadgroestl_cpu_setBlock(int thr_id, void *data, uint32_t *pTargetIn) |
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{ |
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uint32_t msgBlock[32] = { 0 }; |
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memcpy(&msgBlock[0], data, 80); |
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msgBlock[20] = 0x80; |
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msgBlock[31] = 0x01000000; |
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cudaMemcpyToSymbol(myriadgroestl_gpu_msg, msgBlock, 128); |
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cudaMemcpyToSymbol(pTarget, &pTargetIn[6], 2 * sizeof(uint32_t)); |
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} |
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__host__ |
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void myriadgroestl_cpu_hash(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *resNounce) |
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{ |
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uint32_t threadsperblock = 256; |
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cudaMemset(d_resultNonces[thr_id], 0xFF, 2 * sizeof(uint32_t)); |
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// Compute 3.0 benutzt die registeroptimierte Quad Variante mit Warp Shuffle |
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// mit den Quad Funktionen brauchen wir jetzt 4 threads pro Hash, daher Faktor 4 bei der Blockzahl |
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const int factor = 4; |
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dim3 grid(factor*((threads + threadsperblock-1)/threadsperblock)); |
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dim3 block(threadsperblock); |
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int dev_id = device_map[thr_id]; |
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if (device_sm[dev_id] < 300 || cuda_arch[dev_id] < 300) { |
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printf("Sorry, This algo is not supported by this GPU arch (SM 3.0 required)"); |
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return; |
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} |
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myriadgroestl_gpu_hash_quad <<< grid, block >>> (threads, startNounce, d_outputHashes[thr_id]); |
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dim3 grid2((threads + threadsperblock-1)/threadsperblock); |
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myriadgroestl_gpu_hash_sha <<< grid2, block >>> (threads, startNounce, d_outputHashes[thr_id], d_resultNonces[thr_id]); |
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cudaMemcpy(resNounce, d_resultNonces[thr_id], 2 * sizeof(uint32_t), cudaMemcpyDeviceToHost); |
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}
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