mirror of
https://github.com/GOSTSec/ccminer
synced 2025-01-09 14:28:15 +00:00
9eead77027
This will allow later more gpu candidates. Note: This is an unfinished work, we keep the previous behavior for now To finish this, all algos solutions should be migrated and submitted nonces attributes stored. Its required to handle the different share diff per nonce and fix the possible solved count error (if 1/2 nonces is solved).
179 lines
5.3 KiB
Plaintext
179 lines
5.3 KiB
Plaintext
/**
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* Fresh algorithm
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*/
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extern "C" {
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#include "sph/sph_shavite.h"
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#include "sph/sph_simd.h"
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#include "sph/sph_echo.h"
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}
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#include "miner.h"
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#include "cuda_helper.h"
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// to test gpu hash on a null buffer
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#define NULLTEST 0
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static uint32_t *d_hash[MAX_GPUS];
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extern void x11_shavite512_cpu_init(int thr_id, uint32_t threads);
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extern void x11_shavite512_setBlock_80(void *pdata);
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extern void x11_shavite512_cpu_hash_80(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_hash, int order);
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extern void x11_shavite512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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extern int x11_simd512_cpu_init(int thr_id, uint32_t threads);
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extern void x11_simd512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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extern void x11_simd512_cpu_free(int thr_id);
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extern void x11_echo512_cpu_init(int thr_id, uint32_t threads);
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extern void x11_echo512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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// CPU Hash
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extern "C" void fresh_hash(void *state, const void *input)
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{
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// shavite-simd-shavite-simd-echo
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sph_shavite512_context ctx_shavite;
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sph_simd512_context ctx_simd;
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sph_echo512_context ctx_echo;
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unsigned char hash[128]; // uint32_t hashA[16], hashB[16];
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#define hashA hash
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#define hashB hash+64
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memset(hash, 0, sizeof hash);
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sph_shavite512_init(&ctx_shavite);
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sph_shavite512(&ctx_shavite, input, 80);
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sph_shavite512_close(&ctx_shavite, hashA);
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sph_simd512_init(&ctx_simd);
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sph_simd512(&ctx_simd, hashA, 64);
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sph_simd512_close(&ctx_simd, hashB);
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sph_shavite512_init(&ctx_shavite);
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sph_shavite512(&ctx_shavite, hashB, 64);
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sph_shavite512_close(&ctx_shavite, hashA);
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sph_simd512_init(&ctx_simd);
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sph_simd512(&ctx_simd, hashA, 64);
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sph_simd512_close(&ctx_simd, hashB);
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sph_echo512_init(&ctx_echo);
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sph_echo512(&ctx_echo, hashB, 64);
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sph_echo512_close(&ctx_echo, hashA);
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memcpy(state, hash, 32);
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}
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static bool init[MAX_GPUS] = { 0 };
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extern "C" int scanhash_fresh(int thr_id, struct work* work, uint32_t max_nonce, unsigned long *hashes_done)
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{
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uint32_t *pdata = work->data;
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uint32_t *ptarget = work->target;
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const uint32_t first_nonce = pdata[19];
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uint32_t endiandata[20];
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uint32_t throughput = cuda_default_throughput(thr_id, 1 << 19);
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if (init[thr_id]) throughput = min(throughput, max_nonce - first_nonce);
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if (opt_benchmark)
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ptarget[7] = 0x00ff;
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if (!init[thr_id])
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{
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cudaSetDevice(device_map[thr_id]);
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if (opt_cudaschedule == -1 && gpu_threads == 1) {
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cudaDeviceReset();
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// reduce cpu usage
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cudaSetDeviceFlags(cudaDeviceScheduleBlockingSync);
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CUDA_LOG_ERROR();
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}
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gpulog(LOG_INFO, thr_id, "Intensity set to %g, %u cuda threads", throughput2intensity(throughput), throughput);
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CUDA_CALL_OR_RET_X(cudaMalloc(&d_hash[thr_id], (size_t)64 * throughput + 4), -1);
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x11_shavite512_cpu_init(thr_id, throughput);
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x11_simd512_cpu_init(thr_id, throughput);
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x11_echo512_cpu_init(thr_id, throughput);
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cuda_check_cpu_init(thr_id, throughput);
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init[thr_id] = true;
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}
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for (int k=0; k < 20; k++)
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be32enc(&endiandata[k], pdata[k]);
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x11_shavite512_setBlock_80((void*)endiandata);
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cuda_check_cpu_setTarget(ptarget);
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do {
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uint32_t foundNonce;
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int order = 0;
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// GPU Hash
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x11_shavite512_cpu_hash_80(thr_id, throughput, pdata[19], d_hash[thr_id], order++);
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x11_simd512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_hash[thr_id], order++);
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x11_shavite512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_hash[thr_id], order++);
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x11_simd512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_hash[thr_id], order++);
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x11_echo512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_hash[thr_id], order++);
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#if NULLTEST
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uint32_t buf[8]; memset(buf, 0, sizeof buf);
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CUDA_SAFE_CALL(cudaMemcpy(buf, d_hash[thr_id], sizeof buf, cudaMemcpyDeviceToHost));
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CUDA_SAFE_CALL(cudaThreadSynchronize());
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print_hash((unsigned char*)buf); printf("\n");
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#endif
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*hashes_done = pdata[19] - first_nonce + throughput;
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foundNonce = cuda_check_hash(thr_id, throughput, pdata[19], d_hash[thr_id]);
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if (foundNonce != UINT32_MAX)
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{
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uint32_t vhash64[8];
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be32enc(&endiandata[19], foundNonce);
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fresh_hash(vhash64, endiandata);
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if (vhash64[7] <= ptarget[7] && fulltest(vhash64, ptarget)) {
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int res = 1;
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uint32_t secNonce = cuda_check_hash_suppl(thr_id, throughput, pdata[19], d_hash[thr_id], 1);
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work_set_target_ratio(work, vhash64);
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if (secNonce != 0) {
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be32enc(&endiandata[19], secNonce);
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fresh_hash(vhash64, endiandata);
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if (bn_hash_target_ratio(vhash64, ptarget) > work->shareratio[0])
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work_set_target_ratio(work, vhash64);
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pdata[21] = secNonce;
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res++;
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}
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pdata[19] = foundNonce;
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return res;
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} else {
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gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU!", foundNonce);
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}
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}
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pdata[19] += throughput;
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} while (pdata[19] < max_nonce && !work_restart[thr_id].restart);
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*hashes_done = pdata[19] - first_nonce + 1;
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return 0;
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}
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// cleanup
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extern "C" void free_fresh(int thr_id)
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{
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if (!init[thr_id])
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return;
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cudaSetDevice(device_map[thr_id]);
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cudaFree(d_hash[thr_id]);
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x11_simd512_cpu_free(thr_id);
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cuda_check_cpu_free(thr_id);
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init[thr_id] = false;
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cudaDeviceSynchronize();
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}
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