mirror of
https://github.com/GOSTSec/ccminer
synced 2025-01-09 06:18:07 +00:00
nvapi: sample i2c rvb led color (gigabyte)
you can now use --led=0xFF00FF to change the color/level (windows only) for non-rvb standard nvidia devices, you can use a level value (0 to 100) ps: i really need to find how to turn them off on linux, not found yet...
This commit is contained in:
parent
801db3d076
commit
d3976cf38d
19
ccminer.cpp
19
ccminer.cpp
@ -130,6 +130,7 @@ uint32_t device_mem_clocks[MAX_GPUS] = { 0 };
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uint32_t device_plimit[MAX_GPUS] = { 0 };
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uint32_t device_plimit[MAX_GPUS] = { 0 };
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uint8_t device_tlimit[MAX_GPUS] = { 0 };
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uint8_t device_tlimit[MAX_GPUS] = { 0 };
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int8_t device_pstate[MAX_GPUS] = { -1, -1 };
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int8_t device_pstate[MAX_GPUS] = { -1, -1 };
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int32_t device_led[MAX_GPUS] = { -1, -1 };
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int opt_cudaschedule = -1;
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int opt_cudaschedule = -1;
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static bool opt_keep_clocks = false;
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static bool opt_keep_clocks = false;
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@ -307,7 +308,8 @@ Options:\n\
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--mem-clock=3505 Set the gpu memory boost clock\n\
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--mem-clock=3505 Set the gpu memory boost clock\n\
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--gpu-clock=1150 Set the gpu engine boost clock\n\
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--gpu-clock=1150 Set the gpu engine boost clock\n\
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--plimit=100 Set the gpu power limit in percentage\n\
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--plimit=100 Set the gpu power limit in percentage\n\
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--tlimit=80 Set the gpu thermal limit in degrees\n"
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--tlimit=80 Set the gpu thermal limit in degrees\n\
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--led=100 Set the logo led level (0=disable, 0xFF00FF for RVB)\n"
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#endif
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#endif
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#ifdef HAVE_SYSLOG_H
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#ifdef HAVE_SYSLOG_H
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"\
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"\
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@ -385,6 +387,7 @@ struct option options[] = {
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{ "plimit", 1, NULL, 1073 },
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{ "plimit", 1, NULL, 1073 },
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{ "keep-clocks", 0, NULL, 1074 },
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{ "keep-clocks", 0, NULL, 1074 },
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{ "tlimit", 1, NULL, 1075 },
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{ "tlimit", 1, NULL, 1075 },
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{ "led", 1, NULL, 1080 },
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#ifdef HAVE_SYSLOG_H
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#ifdef HAVE_SYSLOG_H
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{ "syslog", 0, NULL, 'S' },
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{ "syslog", 0, NULL, 'S' },
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{ "syslog-prefix", 1, NULL, 1018 },
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{ "syslog-prefix", 1, NULL, 1018 },
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@ -2693,6 +2696,7 @@ void parse_arg(int key, char *arg)
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hnvml = nvml_create();
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hnvml = nvml_create();
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#ifdef WIN32
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#ifdef WIN32
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nvapi_init();
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nvapi_init();
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cuda_devicenames(); // req for leds
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nvapi_init_settings();
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nvapi_init_settings();
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#endif
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#endif
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#endif
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#endif
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@ -2948,6 +2952,18 @@ void parse_arg(int key, char *arg)
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}
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}
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}
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}
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break;
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break;
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case 1080: /* --led */
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{
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char *pch = strtok(arg,",");
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int n = 0;
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while (pch != NULL && n < MAX_GPUS) {
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int dev_id = device_map[n++];
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char * p = strstr(pch, "0x");
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device_led[dev_id] = p ? (int32_t) strtoul(p, NULL, 16) : atoi(arg);
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pch = strtok(NULL, ",");
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}
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}
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break;
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case 1005:
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case 1005:
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opt_benchmark = true;
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opt_benchmark = true;
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want_longpoll = false;
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want_longpoll = false;
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@ -3320,6 +3336,7 @@ int main(int argc, char *argv[])
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device_texturecache[i] = -1;
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device_texturecache[i] = -1;
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device_singlememory[i] = -1;
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device_singlememory[i] = -1;
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device_pstate[i] = -1;
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device_pstate[i] = -1;
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device_led[i] = -1;
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}
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}
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cuda_devicenames();
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cuda_devicenames();
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@ -224,7 +224,6 @@ typedef struct {
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NVAPI_GPU_PERF_STATUS; // 1360 bytes (1-0550)
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NVAPI_GPU_PERF_STATUS; // 1360 bytes (1-0550)
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#define NVAPI_GPU_PERF_STATUS_VER MAKE_NVAPI_VERSION(NVAPI_GPU_PERF_STATUS, 1)
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#define NVAPI_GPU_PERF_STATUS_VER MAKE_NVAPI_VERSION(NVAPI_GPU_PERF_STATUS, 1)
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NvAPI_Status NvAPI_DLL_GetInterfaceVersionString(NvAPI_ShortString string);
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NvAPI_Status NvAPI_DLL_GetInterfaceVersionString(NvAPI_ShortString string);
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NvAPI_Status NvAPI_DLL_PerfPoliciesGetInfo(NvPhysicalGpuHandle, NVAPI_GPU_PERF_INFO*); // 409D9841 1-004c
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NvAPI_Status NvAPI_DLL_PerfPoliciesGetInfo(NvPhysicalGpuHandle, NVAPI_GPU_PERF_INFO*); // 409D9841 1-004c
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@ -260,7 +259,6 @@ NvAPI_Status NvAPI_DLL_GetSerialNumber(NvPhysicalGpuHandle handle, NvAPI_ShortSt
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NvAPI_Status NvAPI_DLL_SetPstates20v1(NvPhysicalGpuHandle handle, NV_GPU_PERF_PSTATES20_INFO_V1 *pSet);
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NvAPI_Status NvAPI_DLL_SetPstates20v1(NvPhysicalGpuHandle handle, NV_GPU_PERF_PSTATES20_INFO_V1 *pSet);
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NvAPI_Status NvAPI_DLL_SetPstates20v2(NvPhysicalGpuHandle handle, NV_GPU_PERF_PSTATES20_INFO_V2 *pSet);
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NvAPI_Status NvAPI_DLL_SetPstates20v2(NvPhysicalGpuHandle handle, NV_GPU_PERF_PSTATES20_INFO_V2 *pSet);
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NvAPI_Status NvAPI_DLL_Unload();
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NvAPI_Status NvAPI_DLL_Unload();
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#define NV_ASSERT(x) { NvAPI_Status ret = x; if(ret != NVAPI_OK) return ret; }
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#define NV_ASSERT(x) { NvAPI_Status ret = x; if(ret != NVAPI_OK) return ret; }
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@ -277,3 +275,25 @@ NvAPI_Status NvAPI_DLL_Unload();
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var = (TYPE*) calloc(1, TYPE##_VER & 0xFFFF); \
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var = (TYPE*) calloc(1, TYPE##_VER & 0xFFFF); \
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if (var) var->version = TYPE##_VER; \
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if (var) var->version = TYPE##_VER; \
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}
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}
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//! Used in NvAPI_I2CReadEx()
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typedef struct
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{
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NvU32 version;
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NvU32 displayMask; // Display Mask of the concerned display.
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NvU8 bIsDDCPort; // indicates either the DDC port (TRUE) or the communication port (FALSE) of the concerned display.
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NvU8 i2cDevAddress; // address of the I2C slave. The address should be shifted left by one. 0x50 -> 0xA0.
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NvU8* pbI2cRegAddress; // I2C target register address. May be NULL, which indicates no register address should be sent.
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NvU32 regAddrSize; // size in bytes of target register address. If pbI2cRegAddress is NULL, this field must be 0.
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NvU8* pbData; // buffer of data which is to be read or written (depending on the command).
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NvU32 cbRead; // bytes to read ??? seems required on write too
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NvU32 cbSize; // full size of the data buffer, pbData, to be read or written.
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NV_I2C_SPEED i2cSpeedKhz; // target speed of the transaction in (kHz) (Chosen from the enum NV_I2C_SPEED).
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NvU8 portId; // portid on which device is connected (remember to set bIsPortIdSet if this value is set)
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NvU32 bIsPortIdSet; // set this flag on if and only if portid value is set
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} NV_I2C_INFO_EX;
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#define NV_I2C_INFO_EX_VER MAKE_NVAPI_VERSION(NV_I2C_INFO_EX,3)
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NvAPI_Status NvAPI_DLL_I2CReadEx(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32*);
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NvAPI_Status NvAPI_DLL_I2CWriteEx(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32*);
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22
nvapi.cpp
22
nvapi.cpp
@ -347,6 +347,28 @@ NvAPI_Status NvAPI_DLL_GetVoltages(NvPhysicalGpuHandle handle, NVAPI_VOLTAGES_TA
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return (*pointer)(handle, pInfo);
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return (*pointer)(handle, pInfo);
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}
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}
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#define NVAPI_ID_I2CREADEX 0x4D7B0709 // 3-002c
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NvAPI_Status NvAPI_DLL_I2CReadEx(NvPhysicalGpuHandle handle, NV_I2C_INFO_EX *i2c, NvU32 *exData) {
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static NvAPI_Status (*pointer)(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32*) = NULL;
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if(!nvapi_dll_loaded) return NVAPI_API_NOT_INITIALIZED;
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if(!pointer) {
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pointer = (NvAPI_Status (*)(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32*))nvidia_handle->query(NVAPI_ID_I2CREADEX);
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}
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if(!pointer) return NVAPI_NO_IMPLEMENTATION;
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return (*pointer)(handle, i2c, exData);
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}
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#define NVAPI_ID_I2CWRITEEX 0x283AC65A
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NvAPI_Status NvAPI_DLL_I2CWriteEx(NvPhysicalGpuHandle handle, NV_I2C_INFO_EX *i2c, NvU32 *exData) {
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static NvAPI_Status (*pointer)(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32 *exData) = NULL;
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if(!nvapi_dll_loaded) return NVAPI_API_NOT_INITIALIZED;
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if(!pointer) {
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pointer = (NvAPI_Status (*)(NvPhysicalGpuHandle, NV_I2C_INFO_EX*, NvU32 *exData))nvidia_handle->query(NVAPI_ID_I2CWRITEEX);
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}
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if(!pointer) return NVAPI_NO_IMPLEMENTATION;
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return (*pointer)(handle, i2c, exData);
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}
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#define NVAPI_ID_UNLOAD 0xD22BDD7E
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#define NVAPI_ID_UNLOAD 0xD22BDD7E
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NvAPI_Status NvAPI_DLL_Unload() {
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NvAPI_Status NvAPI_DLL_Unload() {
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static NvAPI_Status (*pointer)() = NULL;
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static NvAPI_Status (*pointer)() = NULL;
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82
nvml.cpp
82
nvml.cpp
@ -37,6 +37,7 @@ extern uint32_t device_mem_clocks[MAX_GPUS];
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extern uint32_t device_plimit[MAX_GPUS];
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extern uint32_t device_plimit[MAX_GPUS];
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extern uint8_t device_tlimit[MAX_GPUS];
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extern uint8_t device_tlimit[MAX_GPUS];
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extern int8_t device_pstate[MAX_GPUS];
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extern int8_t device_pstate[MAX_GPUS];
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extern int32_t device_led[MAX_GPUS];
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uint32_t clock_prev[MAX_GPUS] = { 0 };
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uint32_t clock_prev[MAX_GPUS] = { 0 };
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uint32_t clock_prev_mem[MAX_GPUS] = { 0 };
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uint32_t clock_prev_mem[MAX_GPUS] = { 0 };
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@ -954,6 +955,63 @@ int nvapi_getbios(unsigned int devNum, char *desc, unsigned int maxlen)
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return 0;
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return 0;
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}
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}
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static int SetGigabyteRVBLogo(unsigned int devNum, uint32_t RVB)
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{
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NvAPI_Status ret;
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NV_I2C_INFO_EX* i2cInfo;
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NV_INIT_STRUCT_ALLOC(NV_I2C_INFO_EX, i2cInfo);
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if (i2cInfo == NULL)
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return -ENOMEM;
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NvU32 readBuf[25] = { 0 };
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NvU32 data[5] = { 0 };
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data[0] = 1; // block count or i2c send ?
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data[2] = swab32(RVB & 0xfcfcfcU) | 0x40;
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i2cInfo->i2cDevAddress = 0x90;
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i2cInfo->pbI2cRegAddress = (NvU8*) (&data[2]);
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i2cInfo->regAddrSize = 4; // NVAPI_MAX_SIZEOF_I2C_REG_ADDRESS
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i2cInfo->pbData = (NvU8*) readBuf;
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i2cInfo->cbRead = 2;
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i2cInfo->cbSize = sizeof(readBuf);
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i2cInfo->portId = 1;
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i2cInfo->bIsPortIdSet = 1;
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//ret = NvAPI_DLL_I2CWriteEx(phys[devNum], i2cInfo, data);
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ret = NvAPI_DLL_I2CReadEx(phys[devNum], i2cInfo, data);
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free(i2cInfo);
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return (int) ret;
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}
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int nvapi_set_led(unsigned int devNum, int32_t RVB, char *device_name)
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{
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uint16_t vid = 0, pid = 0;
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NvAPI_Status ret;
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if (strstr(device_name, "Gigabyte GTX 10")) {
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return SetGigabyteRVBLogo(devNum, (uint32_t) RVB);
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} else {
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NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM* illu;
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NV_INIT_STRUCT_ALLOC(NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM, illu);
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illu->hPhysicalGpu = phys[devNum];
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illu->Attribute = NV_GPU_IA_LOGO_BRIGHTNESS;
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ret = NvAPI_GPU_QueryIlluminationSupport(illu);
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if (!ret && illu->bSupported) {
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NV_GPU_GET_ILLUMINATION_PARM *led;
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NV_INIT_STRUCT_ALLOC(NV_GPU_GET_ILLUMINATION_PARM, led);
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led->hPhysicalGpu = phys[devNum];
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led->Attribute = NV_GPU_IA_LOGO_BRIGHTNESS;
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NvAPI_GPU_GetIllumination(led);
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if (opt_debug)
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applog(LOG_DEBUG, " Led level was %u, set to %06x", RVB);
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led->Value = (uint32_t) RVB;
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ret = NvAPI_GPU_SetIllumination((NV_GPU_SET_ILLUMINATION_PARM*) led);
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free(led);
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}
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free(illu);
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return ret;
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}
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}
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int nvapi_pstateinfo(unsigned int devNum)
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int nvapi_pstateinfo(unsigned int devNum)
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{
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{
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uint32_t n;
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uint32_t n;
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@ -1193,23 +1251,6 @@ int nvapi_pstateinfo(unsigned int devNum)
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ret = NvAPI_DLL_PerfPoliciesGetStatus(phys[devNum], &ps);
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ret = NvAPI_DLL_PerfPoliciesGetStatus(phys[devNum], &ps);
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applog(LOG_BLUE, "%llx %lld. %lld. %llx %llx %llx", ps.timeRef, ps.val1, ps.val2, ps.values[0], ps.values[1], ps.values[2]);
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applog(LOG_BLUE, "%llx %lld. %lld. %llx %llx %llx", ps.timeRef, ps.val1, ps.val2, ps.values[0], ps.values[1], ps.values[2]);
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#endif
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#endif
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// led test
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NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM* illu;
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NV_INIT_STRUCT_ON(NV_GPU_QUERY_ILLUMINATION_SUPPORT_PARM, illu, mem);
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illu->hPhysicalGpu = phys[devNum];
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illu->Attribute = NV_GPU_IA_LOGO_BRIGHTNESS;
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ret = NvAPI_GPU_QueryIlluminationSupport(illu);
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if (!ret && illu->bSupported) {
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NV_GPU_GET_ILLUMINATION_PARM led = { 0 };
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led.version = NV_GPU_GET_ILLUMINATION_PARM_VER;
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led.hPhysicalGpu = phys[devNum];
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led.Attribute = NV_GPU_IA_LOGO_BRIGHTNESS;
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NvAPI_GPU_GetIllumination(&led);
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applog(LOG_RAW, " Led level is %u", led.Value);
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//applog(LOG_RAW, " Led level was %u, power off", led.Value);
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//led.Value = 0;
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//ret = NvAPI_GPU_SetIllumination((NV_GPU_SET_ILLUMINATION_PARM*) &led);
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}
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#endif
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#endif
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free(mem);
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free(mem);
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@ -1484,6 +1525,10 @@ int nvapi_init_settings()
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if (ret != NVAPI_OK)
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if (ret != NVAPI_OK)
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return ret;
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return ret;
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if (!opt_n_threads) {
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opt_n_threads = active_gpus;
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}
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for (int n=0; n < opt_n_threads; n++) {
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for (int n=0; n < opt_n_threads; n++) {
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int dev_id = device_map[n % MAX_GPUS];
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int dev_id = device_map[n % MAX_GPUS];
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if (device_plimit[dev_id]) {
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if (device_plimit[dev_id]) {
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@ -1514,6 +1559,9 @@ int nvapi_init_settings()
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if (device_pstate[dev_id]) {
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if (device_pstate[dev_id]) {
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// dunno how via nvapi or/and pascal
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// dunno how via nvapi or/and pascal
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}
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}
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if (device_led[dev_id] != -1) {
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nvapi_set_led(nvapi_dev_map[dev_id], device_led[dev_id], device_name[dev_id]);
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}
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}
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}
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return ret;
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return ret;
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