mirror of
https://github.com/GOSTSec/ccminer
synced 2025-01-26 22:44:15 +00:00
linux: prepare nvidia-settings queries
Note: this method is slower than real apis and requires X opened and configured correctly. sample usage: -d 0,1 --mem-clock=+200,-200
This commit is contained in:
parent
05abaf2b26
commit
bcadca2c45
@ -21,6 +21,7 @@ ccminer_SOURCES = elist.h miner.h compat.h \
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crc32.c hefty1.c \
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ccminer.cpp pools.cpp util.cpp bench.cpp bignum.cpp \
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api.cpp hashlog.cpp nvml.cpp stats.cpp sysinfos.cpp cuda.cpp \
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nvsettings.cpp \
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equi/equi-stratum.cpp equi/equi.cpp equi/blake2/blake2bx.cpp \
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equi/equihash.cpp equi/cuda_equi.cu \
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heavy/heavy.cu \
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26
ccminer.cpp
26
ccminer.cpp
@ -126,6 +126,7 @@ bool opt_trust_pool = false;
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uint16_t opt_vote = 9999;
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int num_cpus;
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int active_gpus;
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bool need_nvsettings = false;
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char * device_name[MAX_GPUS];
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short device_map[MAX_GPUS] = { 0 };
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long device_sm[MAX_GPUS] = { 0 };
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@ -133,6 +134,7 @@ short device_mpcount[MAX_GPUS] = { 0 };
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uint32_t gpus_intensity[MAX_GPUS] = { 0 };
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uint32_t device_gpu_clocks[MAX_GPUS] = { 0 };
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uint32_t device_mem_clocks[MAX_GPUS] = { 0 };
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int32_t device_mem_offsets[MAX_GPUS] = { 0 };
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uint32_t device_plimit[MAX_GPUS] = { 0 };
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uint8_t device_tlimit[MAX_GPUS] = { 0 };
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int8_t device_pstate[MAX_GPUS] = { -1, -1 };
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@ -2058,8 +2060,10 @@ static void *miner_thread(void *userdata)
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}
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/* conditional mining */
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if (!wanna_mine(thr_id)) {
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if (!wanna_mine(thr_id))
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{
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// reset default mem offset before idle..
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if (need_nvsettings) nvs_reset_clocks(dev_id);
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// free gpu resources
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algo_free_all(thr_id);
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// clear any free error (algo switch)
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@ -2084,7 +2088,11 @@ static void *miner_thread(void *userdata)
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sleep(5);
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if (!thr_id) pools[cur_pooln].wait_time += 5;
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continue;
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} else {
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// reapply mem offset if needed
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if (need_nvsettings) nvs_set_clocks(dev_id);
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}
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pool_on_hold = false;
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work_restart[thr_id].restart = 0;
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@ -3164,6 +3172,7 @@ void parse_arg(int key, char *arg)
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nvapi_init_settings();
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#endif
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#endif
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nvs_init();
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cuda_print_devices();
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proper_exit(EXIT_CODE_OK);
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break;
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@ -3389,7 +3398,11 @@ void parse_arg(int key, char *arg)
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int n = 0;
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while (pch != NULL && n < MAX_GPUS) {
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int dev_id = device_map[n++];
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device_mem_clocks[dev_id] = atoi(pch);
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if (*pch == '+' || *pch == '-')
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device_mem_offsets[dev_id] = atoi(pch);
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else
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device_mem_clocks[dev_id] = atoi(pch);
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need_nvsettings = true;
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pch = strtok(NULL, ",");
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}
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}
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@ -4061,6 +4074,13 @@ int main(int argc, char *argv[])
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tq_push(thr_info[stratum_thr_id].q, strdup(rpc_url));
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}
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#ifdef __linux__
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if (need_nvsettings) {
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if (nvs_init() < 0)
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need_nvsettings = false;
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}
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#endif
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#ifdef USE_WRAPNVML
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#if defined(__linux__) || defined(_WIN64)
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/* nvml is currently not the best choice on Windows (only in x64) */
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@ -243,6 +243,7 @@
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<ClCompile Include="equi\equi.cpp" />
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<ClCompile Include="equi\equihash.cpp" />
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<ClCompile Include="nvapi.cpp" />
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<ClCompile Include="nvsettings.cpp" />
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<ClCompile Include="pools.cpp" />
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<ClCompile Include="util.cpp" />
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<ClCompile Include="bench.cpp" />
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@ -597,4 +598,4 @@
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<Target Name="AfterClean">
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<Delete Files="@(FilesToCopy->'$(OutDir)%(Filename)%(Extension)')" TreatErrorsAsWarnings="true" />
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</Target>
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</Project>
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</Project>
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@ -297,6 +297,9 @@
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<ClCompile Include="nvapi.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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<ClCompile Include="nvsettings.cpp">
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<Filter>Source Files</Filter>
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</ClCompile>
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<ClCompile Include="sia\sia-rpc.cpp">
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<Filter>Source Files\sia</Filter>
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</ClCompile>
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@ -935,4 +938,4 @@
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<Filter>Ressources</Filter>
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</Text>
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</ItemGroup>
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</Project>
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</Project>
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4
nvml.cpp
4
nvml.cpp
@ -310,6 +310,8 @@ int nvml_set_clocks(nvml_handle *nvmlh, int dev_id)
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nvmlReturn_t rc;
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uint32_t gpu_clk = 0, mem_clk = 0;
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int n = nvmlh->cuda_nvml_device_id[dev_id];
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//if (need_nvsettings) /* prefer later than init time */
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// nvs_set_clocks(dev_id);
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if (n < 0 || n >= nvmlh->nvml_gpucount)
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return -ENODEV;
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@ -395,6 +397,8 @@ int nvml_reset_clocks(nvml_handle *nvmlh, int dev_id)
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nvmlReturn_t rc;
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uint32_t gpu_clk = 0, mem_clk = 0;
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int n = nvmlh->cuda_nvml_device_id[dev_id];
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if (need_nvsettings)
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nvs_reset_clocks(dev_id);
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if (n < 0 || n >= nvmlh->nvml_gpucount)
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return -ENODEV;
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12
nvml.h
12
nvml.h
@ -250,3 +250,15 @@ void gpu_led_off(int dev_id);
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#define LED_MODE_SHARES 1
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#define LED_MODE_MINING 2
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/* ------ nvidia-settings stuff for linux -------------------- */
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int nvs_init();
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int nvs_set_clocks(int dev_id);
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void nvs_reset_clocks(int dev_id);
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// nvidia-settings (X) devNum from dev_id (cuda GPU #N)
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int8_t nvs_devnum(int dev_id);
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int nvs_devid(int8_t devNum);
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extern bool need_nvsettings;
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247
nvsettings.cpp
Normal file
247
nvsettings.cpp
Normal file
@ -0,0 +1,247 @@
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/**
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* nvidia-settings command line interface for linux - tpruvot 2017
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*
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* Notes: need X setup and running, with an opened X session.
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* init speed could be improved, running multiple threads
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/stat.h>
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#include <sys/types.h> // pid_t
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#include "miner.h"
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#include "nvml.h"
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#include "cuda_runtime.h"
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#ifdef __linux__
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#define NVS_PATH "/usr/bin/nvidia-settings"
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static int8_t nvs_dev_map[MAX_GPUS] = { 0 };
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static uint8_t nvs_bus_ids[MAX_GPUS] = { 0 };
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static int32_t nvs_clocks_set[MAX_GPUS] = { 0 };
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extern int32_t device_mem_offsets[MAX_GPUS];
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#if 0 /* complicated exec way and not better in fine */
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int nvs_query_fork_int(int nvs_id, const char* field)
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{
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pid_t pid;
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int pipes[2] = { 0 };
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if (pipe(pipes) < 0)
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return -1;
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if ((pid = fork()) == -1) {
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close(pipes[0]);
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close(pipes[1]);
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return -1;
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} else if (pid == 0) {
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char gpu_field[128] = { 0 };
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sprintf(gpu_field, "[gpu:%d]/%s", nvs_id, field);
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dup2(pipes[1], STDOUT_FILENO);
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close(pipes[0]);
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//close(pipes[1]);
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if (-1 == execl(NVS_PATH, "nvidia-settings", "-q", gpu_field, "-t", NULL)) {
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exit(-1);
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}
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} else {
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int intval = -1;
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FILE *p = fdopen(pipes[0], "r");
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close(pipes[1]);
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if (!p) {
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applog(LOG_WARNING, "%s: fdopen(%d) failed", __func__, pipes[0]);
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return -1;
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}
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int rc = fscanf(p, "%d", &intval); // BUS 0000:2a:00.0 is read 42
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if (rc > 0) {
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//applog(LOG_BLUE, "%s res=%d", field, intval);
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}
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fclose(p);
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close(pipes[0]);
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return intval;
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}
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return -1;
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}
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#endif
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int nvs_query_int(int nvs_id, const char* field, int showerr)
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{
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FILE *fp;
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char command[256] = { 0 };
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sprintf(command, "%s -t -q '[gpu:%d]/%s' 2>&1", NVS_PATH, nvs_id, field);
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fp = popen(command, "r");
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if (fp) {
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int intval = -1;
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if (!showerr)
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fscanf(fp, "%d", &intval);
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else {
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char msg[512] = { 0 };
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char buf[64] = { 0 };
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ssize_t bytes, len=0, maxlen=sizeof(msg)-1;
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while ((bytes=fscanf(fp, "%s", buf)) > 0) {
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len += snprintf(&msg[len], maxlen-len, "%s ", buf);
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if (len >= maxlen) break;
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}
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if (strstr(msg, "ERROR")) {
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char *xtra = strstr(msg, "; please run");
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if (xtra) *xtra = '\0'; // strip noise
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applog(LOG_INFO, "%s", msg);
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intval = -1;
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} else {
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sscanf(msg, "%d", &intval);
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}
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}
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pclose(fp);
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return intval;
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}
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return -1;
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}
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int nvs_query_str(int nvs_id, const char* field, char* output, size_t maxlen)
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{
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FILE *fp;
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char command[256] = { 0 };
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*output = '\0';
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sprintf(command, "%s -t -q '[gpu:%d]/%s' 2>&1", NVS_PATH, nvs_id, field);
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fp = popen(command, "r");
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if (fp) {
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char buf[256] = { 0 };
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ssize_t len=0;
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ssize_t bytes=0;
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while ((bytes=fscanf(fp, "%s", buf)) > 0) {
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//applog(LOG_BLUE, "%d %s %d", nvs_id, buf, (int) bytes);
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len += snprintf(&output[len], maxlen-len, "%s ", buf);
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if (len >= maxlen) break;
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}
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pclose(fp);
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if (strstr(output, "ERROR")) {
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char *xtra = strstr(output, "; please run");
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if (xtra) *xtra = '\0'; // strip noise
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applog(LOG_INFO, "%s", output);
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*output='\0';
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}
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return (int) len;
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}
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return -1;
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}
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int nvs_set_int(int nvs_id, const char* field, int value)
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{
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FILE *fp;
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char command[256] = { 0 };
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int res = -1;
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snprintf(command, 256, "%s -a '[gpu:%d]/%s=%d' 2>&1", NVS_PATH, nvs_id, field, value);
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fp = popen(command, "r");
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if (fp) {
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char msg[512] = { 0 };
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char buf[64] = { 0 };
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ssize_t bytes, len=0, maxlen=sizeof(msg)-1;
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while ((bytes=fscanf(fp, "%s", buf)) > 0) {
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len += snprintf(&msg[len], maxlen-len, "%s ", buf);
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if (len >= maxlen) break;
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}
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if (strstr(msg, "ERROR")) {
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char *xtra = strstr(msg, "; please run");
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if (xtra) *xtra = '\0'; // strip noise
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applog(LOG_INFO, "%s", msg);
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} else
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res = 0;
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pclose(fp);
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}
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return res;
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}
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int8_t nvs_devnum(int dev_id)
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{
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return nvs_dev_map[dev_id];
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}
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int nvs_devid(int8_t nvs_id)
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{
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for (int i=0; i < opt_n_threads; i++) {
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int dev_id = device_map[i % MAX_GPUS];
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if (nvs_dev_map[dev_id] == nvs_id)
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return dev_id;
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}
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return 0;
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}
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int nvs_init()
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{
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struct stat info;
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struct timeval tv_start, tv_end, diff;
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int x_devices = 0;
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int n_threads = opt_n_threads;
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if (stat(NVS_PATH, &info))
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return -ENOENT;
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gettimeofday(&tv_start, NULL);
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for (int d = 0; d < MAX_GPUS; d++) {
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// this part can be "slow" (100-200ms per device)
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int res = nvs_query_int(d, "PCIBus", 1);
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if (res < 0) break;
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nvs_bus_ids[d] = 0xFFu & res;
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x_devices++;
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}
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if (opt_debug) {
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gettimeofday(&tv_end, NULL);
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timeval_subtract(&diff, &tv_end, &tv_start);
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applog(LOG_DEBUG, "nvidia-settings pci bus queries took %.2f ms",
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(1000.0 * diff.tv_sec) + (0.001 * diff.tv_usec));
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}
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if (!x_devices)
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return -ENODEV;
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if (!n_threads) n_threads = cuda_num_devices();
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for (int i = 0; i < n_threads; i++) {
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int dev_id = device_map[i % MAX_GPUS];
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cudaDeviceProp props;
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if (cudaGetDeviceProperties(&props, dev_id) == cudaSuccess) {
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for (int8_t d = 0; d < x_devices; d++) {
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if (nvs_bus_ids[d] == (uint8_t) props.pciBusID) {
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gpulog(LOG_DEBUG, i, "matches X gpu:%d by busId %u",
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(int) d, (uint) nvs_bus_ids[d]);
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nvs_dev_map[dev_id] = d;
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/* char buf[1024] = { 0 };
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nvs_query_str(d, "GPUCurrentClockFreqsString", buf, sizeof(buf)-1);
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gpulog(LOG_DEBUG, d, "%s", buf); */
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break;
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}
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}
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}
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}
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return 0;
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}
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int nvs_set_clocks(int dev_id)
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{
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int res;
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int8_t d = nvs_devnum(dev_id);
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if (d < 0) return -ENODEV;
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if (!device_mem_offsets[dev_id] || nvs_clocks_set[d]) return 0;
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res = nvs_set_int(d, "GPUMemoryTransferRateOffsetAllPerformanceLevels", device_mem_offsets[dev_id]*2);
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if (res) nvs_clocks_set[d] = device_mem_offsets[dev_id]*2;
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return res;
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}
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void nvs_reset_clocks(int dev_id)
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{
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int8_t d = nvs_devnum(dev_id);
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if (d < 0 || !nvs_clocks_set[d]) return;
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nvs_set_int(d, "GPUMemoryTransferRateOffsetAllPerformanceLevels", 0);
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nvs_clocks_set[d] = 0;
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}
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#else
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int nvs_init() { return -ENOSYS; }
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int nvs_set_clocks(int dev_id) { return -ENOSYS; }
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void nvs_reset_clocks(int dev_id) { }
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#endif
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