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https://github.com/GOSTSec/ccminer
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simd: then reindent the code
no changes, only error checks (cuda safe call)
This commit is contained in:
Tanguy Pruvot
parent
b465fe6825
commit
93f4409dde
@ -1,13 +1,14 @@
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// Parallelisierung:
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// Parallelization:
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//
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// FFT_8 wird 2 mal 8-fach parallel ausgeführt (in FFT_64)
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// und 1 mal 16-fach parallel (in FFT_128_full)
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// FFT_8 wird 2 times 8-fach parallel ausgeführt (in FFT_64)
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// and 1 time 16-fach parallel (in FFT_128_full)
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//
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// STEP8_IF und STEP8_MAJ beinhalten je zwei 8-fach parallele Operationen
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// STEP8_IF and STEP8_MAJ beinhalten je 2x 8-fach parallel Operations
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#define TPB 64
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#include "cuda_helper.h"
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#include <stdio.h>
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// aus heavy.cu
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extern cudaError_t MyStreamSynchronize(cudaStream_t stream, int situation, int thr_id);
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@ -76,6 +77,7 @@ static const int h_FFT256_2_128_Twiddle[128] = {
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#define IF(x, y, z) ((((y) ^ (z)) & (x)) ^ (z))
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#define MAJ(x, y, z) (((z) & (y)) | (((z) | (y)) & (x)))
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#include "x11/simd_functions.cu"
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/********************* Message expansion ************************/
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@ -84,7 +86,8 @@ static const int h_FFT256_2_128_Twiddle[128] = {
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* Reduce modulo 257; result is in [-127; 383]
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* REDUCE(x) := (x&255) - (x>>8)
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*/
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#define REDUCE(x) (((x)&255) - ((x)>>8))
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#define REDUCE(x) \
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(((x)&255) - ((x)>>8))
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/*
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* Reduce from [-127; 383] to [-128; 128]
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@ -99,7 +102,8 @@ static const int h_FFT256_2_128_Twiddle[128] = {
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#define REDUCE_FULL_S(x) \
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EXTRA_REDUCE_S(REDUCE(x))
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__device__ __forceinline__ void FFT_8(int *y, int stripe) {
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__device__ __forceinline__
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void FFT_8(int *y, int stripe) {
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/*
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* FFT_8 using w=4 as 8th root of unity
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@ -163,12 +167,11 @@ X(j) = (u-v) << (2*n); \
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__device__ __forceinline__ void FFT_16(int *y) {
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/*
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/**
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* FFT_16 using w=2 as 16th root of unity
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* Unrolled decimation in frequency (DIF) radix-2 NTT.
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* Output data is in revbin_permuted order.
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*/
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#define DO_REDUCE_FULL_S(i) \
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do { \
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y[i] = REDUCE(y[i]); \
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@ -274,7 +277,9 @@ y[i] = EXTRA_REDUCE_S(y[i]); \
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#undef DO_REDUCE_FULL_S
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}
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__device__ __forceinline__ void FFT_128_full(int y[128]) {
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__device__ __forceinline__
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void FFT_128_full(int y[128])
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{
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int i;
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FFT_8(y+0,2); // eight parallel FFT8's
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@ -289,11 +294,9 @@ __device__ __forceinline__ void FFT_128_full(int y[128]) {
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FFT_16(y+2*i); // eight sequential FFT16's, each one executed in parallel by 8 threads
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}
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__device__ __forceinline__ void FFT_256_halfzero(int y[256]) {
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int i;
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__device__ __forceinline__
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void FFT_256_halfzero(int y[256])
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{
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/*
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* FFT_256 using w=41 as 256th root of unity.
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* Decimation in frequency (DIF) NTT.
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@ -303,10 +306,10 @@ __device__ __forceinline__ void FFT_256_halfzero(int y[256]) {
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const int tmp = y[15];
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#pragma unroll 8
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for (i=0; i<8; i++)
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for (int i=0; i<8; i++)
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y[16+i] = REDUCE(y[i] * c_FFT256_2_128_Twiddle[8*i+(threadIdx.x&7)]);
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#pragma unroll 8
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for (i=8; i<16; i++)
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for (int i=8; i<16; i++)
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y[16+i] = 0;
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/* handle X^255 with an additional butterfly */
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@ -323,19 +326,18 @@ __device__ __forceinline__ void FFT_256_halfzero(int y[256]) {
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/***************************************************/
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__device__ __forceinline__ void Expansion(const uint32_t *data, uint4 *g_temp4)
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__device__ __forceinline__
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void Expansion(const uint32_t *data, uint4 *g_temp4)
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{
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int i;
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/* Message Expansion using Number Theoretical Transform similar to FFT */
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int expanded[32];
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#pragma unroll 4
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for (i=0; i < 4; i++) {
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for (int i=0; i < 4; i++) {
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expanded[ i] = __byte_perm(__shfl((int)data[0], 2*i, 8), __shfl((int)data[0], (2*i)+1, 8), threadIdx.x&7)&0xff;
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expanded[4+i] = __byte_perm(__shfl((int)data[1], 2*i, 8), __shfl((int)data[1], (2*i)+1, 8), threadIdx.x&7)&0xff;
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}
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#pragma unroll 8
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for (i=8; i < 16; i++)
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for (int i=8; i < 16; i++)
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expanded[i] = 0;
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FFT_256_halfzero(expanded);
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@ -447,7 +449,6 @@ __device__ __forceinline__ void Expansion(const uint32_t *data, uint4 *g_temp4)
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//{ 14, 78, 46, 110, 30, 94, 62, 126 }, { 15, 79, 47, 111, 31, 95, 63, 127 },
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//{ 2, 66, 34, 98, 18, 82, 50, 114 }, { 3, 67, 35, 99, 19, 83, 51, 115 },
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bool sel = ((threadIdx.x+2)&7) >= 4; // 2,3,4,5
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P1 = sel?expanded[0]:expanded[1]; Q1 = __shfl(P1, threadIdx.x^1, 8);
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@ -474,7 +475,6 @@ __device__ __forceinline__ void Expansion(const uint32_t *data, uint4 *g_temp4)
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// 0 8 4 12 2 10 6 14 0 8 4 12 2 10 6 14 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
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// 1 9 5 13 3 11 7 15 1 9 5 13 3 11 7 15 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5
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P1 = sel?expanded[1]:expanded[0]; Q1 = __shfl(P1, threadIdx.x^1, 8);
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Q2 = sel?expanded[3]:expanded[2]; P2 = __shfl(Q2, threadIdx.x^1, 8);
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P = even? P1 : P2; Q = even? Q1 : Q2;
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@ -552,7 +552,7 @@ __device__ __forceinline__ void Expansion(const uint32_t *data, uint4 *g_temp4)
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}
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/***************************************************/
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// Die Hash-Funktion
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__global__ void __launch_bounds__(TPB,4)
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x11_simd512_gpu_expand_64(int threads, uint32_t startNounce, uint64_t *g_hash, uint32_t *g_nonceVector, uint4 *g_temp4)
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{
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@ -567,6 +567,7 @@ x11_simd512_gpu_expand_64(int threads, uint32_t startNounce, uint64_t *g_hash, u
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// Hash einlesen und auf 8 Threads und 2 Register verteilen
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uint32_t Hash[2];
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#pragma unroll 2
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for (int i=0; i<2; i++)
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Hash[i] = inpHash[8*i + (threadIdx.x & 7)];
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@ -622,18 +623,11 @@ x11_simd512_gpu_final_64(int threads, uint32_t startNounce, uint64_t *g_hash, ui
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}
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}
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// Setup-Funktionen
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__host__ void x11_simd512_cpu_init(int thr_id, int threads)
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__host__
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void x11_simd512_cpu_init(int thr_id, int threads)
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{
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cudaMalloc( &d_state[thr_id], 32*sizeof(int)*threads );
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cudaMalloc( &d_temp4[thr_id], 64*sizeof(uint4)*threads );
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// Textur für 128 Bit Zugriffe
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cudaChannelFormatDesc channelDesc128 = cudaCreateChannelDesc<uint4>();
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texRef1D_128.normalized = 0;
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texRef1D_128.filterMode = cudaFilterModePoint;
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texRef1D_128.addressMode[0] = cudaAddressModeClamp;
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cudaBindTexture(NULL, &texRef1D_128, d_temp4[thr_id], &channelDesc128, 64*sizeof(uint4)*threads);
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CUDA_SAFE_CALL(cudaMalloc(&d_state[thr_id], 32*sizeof(int)*threads));
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CUDA_SAFE_CALL(cudaMalloc(&d_temp4[thr_id], 64*sizeof(uint4)*threads));
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cudaMemcpyToSymbol(c_perm, h_perm, sizeof(h_perm), 0, cudaMemcpyHostToDevice);
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cudaMemcpyToSymbol(c_IV_512, h_IV_512, sizeof(h_IV_512), 0, cudaMemcpyHostToDevice);
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@ -644,28 +638,31 @@ __host__ void x11_simd512_cpu_init(int thr_id, int threads)
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cudaMemcpyToSymbol(d_cw1, h_cw1, sizeof(h_cw1), 0, cudaMemcpyHostToDevice);
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cudaMemcpyToSymbol(d_cw2, h_cw2, sizeof(h_cw2), 0, cudaMemcpyHostToDevice);
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cudaMemcpyToSymbol(d_cw3, h_cw3, sizeof(h_cw3), 0, cudaMemcpyHostToDevice);
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// Texture for 128-Bit Zugriffe
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cudaChannelFormatDesc channelDesc128 = cudaCreateChannelDesc<uint4>();
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texRef1D_128.normalized = 0;
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texRef1D_128.filterMode = cudaFilterModePoint;
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texRef1D_128.addressMode[0] = cudaAddressModeClamp;
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CUDA_SAFE_CALL(cudaBindTexture(NULL, &texRef1D_128, d_temp4[thr_id], &channelDesc128, 64*sizeof(uint4)*threads));
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}
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__host__ void x11_simd512_cpu_hash_64(int thr_id, int threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order)
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__host__
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void x11_simd512_cpu_hash_64(int thr_id, int threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order)
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{
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const int threadsperblock = TPB;
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// Größe des dynamischen Shared Memory Bereichs
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size_t shared_size = 0;
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// berechne wie viele Thread Blocks wir brauchen
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dim3 block(threadsperblock);
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dim3 grid8(((threads + threadsperblock-1)/threadsperblock)*8);
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x11_simd512_gpu_expand_64<<<grid8, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id]);
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x11_simd512_gpu_expand_64 <<<grid8, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id]);
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dim3 grid((threads + threadsperblock-1)/threadsperblock);
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// künstlich die Occupancy limitieren, um das totale Erschöpfen des Texture Cache zu vermeiden
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x11_simd512_gpu_compress1_64<<<grid, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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x11_simd512_gpu_compress2_64<<<grid, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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x11_simd512_gpu_compress1_64 <<<grid, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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x11_simd512_gpu_compress2_64 <<<grid, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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x11_simd512_gpu_final_64<<<grid, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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x11_simd512_gpu_final_64 <<<grid, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector, d_temp4[thr_id], d_state[thr_id]);
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MyStreamSynchronize(NULL, order, thr_id);
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}
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@ -147,7 +147,6 @@ extern "C" int scanhash_x11(int thr_id, uint32_t *pdata,
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if (!init[thr_id])
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{
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CUDA_SAFE_CALL(cudaSetDevice(device_map[thr_id]));
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// Konstanten kopieren, Speicher belegen
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CUDA_SAFE_CALL(cudaMalloc(&d_hash[thr_id], 16 * sizeof(uint32_t) * throughput));
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quark_blake512_cpu_init(thr_id, throughput);
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