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@ -2,13 +2,11 @@ |
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* Blake-256 Decred 180-Bytes input Cuda Kernel (Tested on SM 5/5.2) |
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* Blake-256 Decred 180-Bytes input Cuda Kernel (Tested on SM 5/5.2) |
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* |
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* |
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* Tanguy Pruvot - Feb 2016 |
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* Tanguy Pruvot - Feb 2016 |
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* |
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* Alexis Provos - Mar 2016 |
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* Revised for optimisation by pallas @ bitcointalk - Apr 2016 |
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*/ |
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*/ |
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#include <stdint.h> |
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#include <stdint.h> |
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#include <memory.h> |
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#include <memory.h> |
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#include <miner.h> |
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#include <miner.h> |
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extern "C" { |
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extern "C" { |
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@ -16,9 +14,7 @@ extern "C" { |
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} |
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} |
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/* threads per block */ |
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/* threads per block */ |
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#define TPB 512 |
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#define TPB 640 |
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/* nonces per round */ |
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#define NPR 128 |
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/* hash by cpu with blake 256 */ |
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/* hash by cpu with blake 256 */ |
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extern "C" void decred_hash(void *output, const void *input) |
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extern "C" void decred_hash(void *output, const void *input) |
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@ -38,253 +34,145 @@ extern "C" void decred_hash(void *output, const void *input) |
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#define __byte_perm(x, y, b) x |
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#define __byte_perm(x, y, b) x |
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#endif |
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#endif |
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__constant__ uint32_t _ALIGN(4) d_data[24]; |
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__constant__ uint32_t _ALIGN(16) c_data[32]; |
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__constant__ uint32_t _ALIGN(16) c_h[ 2]; |
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__constant__ uint32_t _ALIGN(16) c_xors[215]; |
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/* 16 adapters max */ |
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/* 16 adapters max */ |
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static uint32_t *d_resNonce[MAX_GPUS]; |
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static uint32_t *d_resNonce[MAX_GPUS]; |
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static uint32_t *h_resNonce[MAX_GPUS]; |
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static uint32_t *h_resNonce[MAX_GPUS]; |
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/* max count of found nonces in one call */ |
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/* macro bodies */ |
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#define NBN 2 |
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#define pxorGS(a,b,c,d) { \ |
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#if NBN > 1 |
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v[a]+= c_xors[i++] + v[b]; \ |
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static uint32_t extra_results[NBN] = { UINT32_MAX }; |
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#endif |
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/* ############################################################################################################################### */ |
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#define GSPREC(a,b,c,d,x,y) { \ |
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v[a] += (m[x] ^ c_u256[y]) + v[b]; \ |
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v[d] = __byte_perm(v[d] ^ v[a], 0, 0x1032); \ |
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v[d] = __byte_perm(v[d] ^ v[a], 0, 0x1032); \ |
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v[c] += v[d]; \ |
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v[c]+= v[d]; \ |
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v[b] = SPH_ROTR32(v[b] ^ v[c], 12); \ |
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v[b] = ROTR32(v[b] ^ v[c], 12); \ |
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v[a] += (m[y] ^ c_u256[x]) + v[b]; \ |
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v[a]+= c_xors[i++] + v[b]; \ |
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v[d] = __byte_perm(v[d] ^ v[a], 0, 0x0321); \ |
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v[d] = __byte_perm(v[d] ^ v[a], 0, 0x0321); \ |
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v[c] += v[d]; \ |
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v[c]+= v[d]; \ |
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v[b] = SPH_ROTR32(v[b] ^ v[c], 7); \ |
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v[b] = ROTR32(v[b] ^ v[c], 7); \ |
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} |
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} |
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#define pxorGS2(a,b,c,d,a1,b1,c1,d1) {\ |
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#define GSPREC4(a0,b0,c0,d0,x0,y0,a1,b1,c1,d1,x1,y1,a2,b2,c2,d2,x2,y2,a3,b3,c3,d3,x3,y3) { \ |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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v[a0] += (m[x0] ^ c_u256[y0]) + v[b0]; \ |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x1032); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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v[a1] += (m[x1] ^ c_u256[y1]) + v[b1]; \ |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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v[a2] += (m[x2] ^ c_u256[y2]) + v[b2]; \ |
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v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \ |
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v[a3] += (m[x3] ^ c_u256[y3]) + v[b3]; \ |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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v[d0] = __byte_perm(v[d0] ^ v[a0], 0, 0x1032); \ |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x0321); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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v[d2] = __byte_perm(v[d2] ^ v[a2], 0, 0x1032); \ |
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v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \ |
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v[d3] = __byte_perm(v[d3] ^ v[a3], 0, 0x1032); \ |
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v[c0] += v[d0]; \ |
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v[c1] += v[d1]; \ |
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v[c2] += v[d2]; \ |
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v[c3] += v[d3]; \ |
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v[b0] = SPH_ROTR32(v[b0] ^ v[c0], 12); \ |
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v[b1] = SPH_ROTR32(v[b1] ^ v[c1], 12); \ |
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v[b2] = SPH_ROTR32(v[b2] ^ v[c2], 12); \ |
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v[b3] = SPH_ROTR32(v[b3] ^ v[c3], 12); \ |
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v[a0] += (m[y0] ^ c_u256[x0]) + v[b0]; \ |
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v[a1] += (m[y1] ^ c_u256[x1]) + v[b1]; \ |
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v[a2] += (m[y2] ^ c_u256[x2]) + v[b2]; \ |
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v[a3] += (m[y3] ^ c_u256[x3]) + v[b3]; \ |
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v[d0] = __byte_perm(v[d0] ^ v[a0], 0, 0x0321); \ |
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v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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v[d2] = __byte_perm(v[d2] ^ v[a2], 0, 0x0321); \ |
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v[d3] = __byte_perm(v[d3] ^ v[a3], 0, 0x0321); \ |
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v[c0] += v[d0]; \ |
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v[c1] += v[d1]; \ |
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v[c2] += v[d2]; \ |
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v[c3] += v[d3]; \ |
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v[b0] = SPH_ROTR32(v[b0] ^ v[c0], 7); \ |
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v[b1] = SPH_ROTR32(v[b1] ^ v[c1], 7); \ |
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v[b2] = SPH_ROTR32(v[b2] ^ v[c2], 7); \ |
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v[b3] = SPH_ROTR32(v[b3] ^ v[c3], 7); \ |
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} |
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} |
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#define pxory1GS2(a,b,c,d,a1,b1,c1,d1) { \ |
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static const __constant__ uint32_t c_u256[16] = { |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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0x243F6A88, 0x85A308D3, 0x13198A2E, 0x03707344, |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x1032); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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0xA4093822, 0x299F31D0, 0x082EFA98, 0xEC4E6C89, |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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0x452821E6, 0x38D01377, 0xBE5466CF, 0x34E90C6C, |
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v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \ |
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0xC0AC29B7, 0xC97C50DD, 0x3F84D5B5, 0xB5470917 |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= (c_xors[i++]^nonce) + v[b1]; \ |
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}; |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x0321); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \ |
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__device__ __forceinline__ |
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} |
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uint32_t blake256_compress_14(uint32_t *m, uint32_t *v_init, uint32_t d_data6, uint32_t d_data7) |
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#define pxory0GS2(a,b,c,d,a1,b1,c1,d1) { \ |
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{ |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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uint32_t v[16]; |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x1032); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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#pragma unroll |
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v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \ |
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for (uint32_t i = 0; i < 16; i++) v[i] = v_init[i]; |
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v[ a]+= (c_xors[i++]^nonce) + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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// these two are not modified: |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x0321); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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v[ 9] = 0x85A308D3; |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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v[13] = 0x299F31D0 ^ (180U*8U); |
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v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \ |
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} |
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// round 1 with nonce |
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#define pxorx1GS2(a,b,c,d,a1,b1,c1,d1) { \ |
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GSPREC(1, 5, 0x9, 0xD, 2, 3); |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= (c_xors[i++]^nonce) + v[b1]; \ |
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GSPREC(0, 5, 0xA, 0xF, 8, 9); |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x1032); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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GSPREC(1, 6, 0xB, 0xC, 10, 11); |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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GSPREC(2, 7, 0x8, 0xD, 12, 13); |
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v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \ |
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GSPREC(3, 4, 0x9, 0xE, 14, 15); |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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// round 2 |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x0321); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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GSPREC4(0, 4, 0x8, 0xC, 14, 10, 1, 5, 0x9, 0xD, 4, 8, 2, 6, 0xA, 0xE, 9, 15, 3, 7, 0xB, 0xF, 13, 6); |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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GSPREC4(0, 5, 0xA, 0xF, 1, 12, 1, 6, 0xB, 0xC, 0, 2, 2, 7, 0x8, 0xD, 11, 7, 3, 4, 0x9, 0xE, 5, 3); |
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v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \ |
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// round 3 |
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} |
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GSPREC4(0, 4, 0x8, 0xC, 11, 8, 1, 5, 0x9, 0xD, 12, 0, 2, 6, 0xA, 0xE, 5, 2, 3, 7, 0xB, 0xF, 15, 13); |
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#define pxorx0GS2(a,b,c,d,a1,b1,c1,d1) { \ |
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GSPREC4(0, 5, 0xA, 0xF, 10, 14, 1, 6, 0xB, 0xC, 3, 6, 2, 7, 0x8, 0xD, 7, 1, 3, 4, 0x9, 0xE, 9, 4); |
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v[ a]+= (c_xors[i++]^nonce) + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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// round 4 |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x1032); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x1032); \ |
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GSPREC4(0, 4, 0x8, 0xC, 7, 9, 1, 5, 0x9, 0xD, 3, 1, 2, 6, 0xA, 0xE, 13, 12, 3, 7, 0xB, 0xF, 11, 14); |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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GSPREC4(0, 5, 0xA, 0xF, 2, 6, 1, 6, 0xB, 0xC, 5, 10, 2, 7, 0x8, 0xD, 4, 0, 3, 4, 0x9, 0xE, 15, 8); |
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v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \ |
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// round 5 |
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v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \ |
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GSPREC4(0, 4, 0x8, 0xC, 9, 0, 1, 5, 0x9, 0xD, 5, 7, 2, 6, 0xA, 0xE, 2, 4, 3, 7, 0xB, 0xF, 10, 15); |
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v[ d] = __byte_perm(v[ d] ^ v[ a], 0, 0x0321); v[d1] = __byte_perm(v[d1] ^ v[a1], 0, 0x0321); \ |
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GSPREC4(0, 5, 0xA, 0xF, 14, 1, 1, 6, 0xB, 0xC, 11, 12, 2, 7, 0x8, 0xD, 6, 8, 3, 4, 0x9, 0xE, 3, 13); |
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v[ c]+= v[ d]; v[c1]+= v[d1]; \ |
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// round 6 |
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v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \ |
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GSPREC4(0, 4, 0x8, 0xC, 2, 12, 1, 5, 0x9, 0xD, 6, 10, 2, 6, 0xA, 0xE, 0, 11, 3, 7, 0xB, 0xF, 8, 3); |
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GSPREC4(0, 5, 0xA, 0xF, 4, 13, 1, 6, 0xB, 0xC, 7, 5, 2, 7, 0x8, 0xD, 15,14, 3, 4, 0x9, 0xE, 1, 9); |
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// round 7 |
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GSPREC4(0, 4, 0x8, 0xC, 12, 5, 1, 5, 0x9, 0xD, 1, 15, 2, 6, 0xA, 0xE, 14,13, 3, 7, 0xB, 0xF, 4, 10); |
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GSPREC4(0, 5, 0xA, 0xF, 0, 7, 1, 6, 0xB, 0xC, 6, 3, 2, 7, 0x8, 0xD, 9, 2, 3, 4, 0x9, 0xE, 8, 11); |
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#ifdef FULL_4WAY |
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// round 8 |
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GSPREC4(0, 4, 0x8, 0xC, 13,11, 1, 5, 0x9, 0xD, 7, 14, 2, 6, 0xA, 0xE, 12, 1, 3, 7, 0xB, 0xF, 3, 9); |
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GSPREC4(0, 5, 0xA, 0xF, 5, 0, 1, 6, 0xB, 0xC, 15, 4, 2, 7, 0x8, 0xD, 8, 6, 3, 4, 0x9, 0xE, 2, 10); |
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// round 9 |
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GSPREC4(0, 4, 0x8, 0xC, 6, 15, 1, 5, 0x9, 0xD, 14, 9, 2, 6, 0xA, 0xE, 11, 3, 3, 7, 0xB, 0xF, 0, 8); |
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GSPREC4(0, 5, 0xA, 0xF, 12, 2, 1, 6, 0xB, 0xC, 13, 7, 2, 7, 0x8, 0xD, 1, 4, 3, 4, 0x9, 0xE, 10, 5); |
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// round 10 |
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GSPREC4(0, 4, 0x8, 0xC, 10, 2, 1, 5, 0x9, 0xD, 8, 4, 2, 6, 0xA, 0xE, 7, 6, 3, 7, 0xB, 0xF, 1, 5); |
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GSPREC4(0, 5, 0xA, 0xF, 15,11, 1, 6, 0xB, 0xC, 9, 14, 2, 7, 0x8, 0xD, 3, 12, 3, 4, 0x9, 0xE, 13, 0); |
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// round 11 |
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GSPREC4(0, 4, 0x8, 0xC, 0, 1, 1, 5, 0x9, 0xD, 2, 3, 2, 6, 0xA, 0xE, 4, 5, 3, 7, 0xB, 0xF, 6, 7); |
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GSPREC4(0, 5, 0xA, 0xF, 8, 9, 1, 6, 0xB, 0xC, 10,11, 2, 7, 0x8, 0xD, 12,13, 3, 4, 0x9, 0xE, 14,15); |
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// round 12 |
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GSPREC4(0, 4, 0x8, 0xC, 14,10, 1, 5, 0x9, 0xD, 4, 8, 2, 6, 0xA, 0xE, 9, 15, 3, 7, 0xB, 0xF, 13, 6); |
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GSPREC4(0, 5, 0xA, 0xF, 1, 12, 1, 6, 0xB, 0xC, 0, 2, 2, 7, 0x8, 0xD, 11, 7, 3, 4, 0x9, 0xE, 5, 3); |
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// round 13 |
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GSPREC4(0, 4, 0x8, 0xC, 11, 8, 1, 5, 0x9, 0xD, 12, 0, 2, 6, 0xA, 0xE, 5, 2, 3, 7, 0xB, 0xF, 15,13); |
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GSPREC4(0, 5, 0xA, 0xF, 10,14, 1, 6, 0xB, 0xC, 3, 6, 2, 7, 0x8, 0xD, 7, 1, 3, 4, 0x9, 0xE, 9, 4); |
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#else |
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// round 8 |
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GSPREC(0, 4, 0x8, 0xC, 13,11); |
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GSPREC(1, 5, 0x9, 0xD, 7, 14); |
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GSPREC(2, 6, 0xA, 0xE, 12, 1); |
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GSPREC(3, 7, 0xB, 0xF, 3, 9); |
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GSPREC(0, 5, 0xA, 0xF, 5, 0); |
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GSPREC(1, 6, 0xB, 0xC, 15, 4); |
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GSPREC(2, 7, 0x8, 0xD, 8, 6); |
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GSPREC(3, 4, 0x9, 0xE, 2, 10); |
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// round 9 |
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GSPREC(0, 4, 0x8, 0xC, 6, 15); |
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GSPREC(1, 5, 0x9, 0xD, 14, 9); |
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GSPREC(2, 6, 0xA, 0xE, 11, 3); |
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GSPREC(3, 7, 0xB, 0xF, 0, 8); |
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GSPREC(0, 5, 0xA, 0xF, 12, 2); |
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GSPREC(1, 6, 0xB, 0xC, 13, 7); |
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GSPREC(2, 7, 0x8, 0xD, 1, 4); |
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GSPREC(3, 4, 0x9, 0xE, 10, 5); |
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// round 10 |
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GSPREC(0, 4, 0x8, 0xC, 10, 2); |
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GSPREC(1, 5, 0x9, 0xD, 8, 4); |
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GSPREC(2, 6, 0xA, 0xE, 7, 6); |
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GSPREC(3, 7, 0xB, 0xF, 1, 5); |
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GSPREC(0, 5, 0xA, 0xF, 15,11); |
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GSPREC(1, 6, 0xB, 0xC, 9, 14); |
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GSPREC(2, 7, 0x8, 0xD, 3, 12); |
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GSPREC(3, 4, 0x9, 0xE, 13, 0); |
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// round 11 |
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GSPREC(0, 4, 0x8, 0xC, 0, 1); |
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GSPREC(1, 5, 0x9, 0xD, 2, 3); |
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GSPREC(2, 6, 0xA, 0xE, 4, 5); |
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GSPREC(3, 7, 0xB, 0xF, 6, 7); |
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GSPREC(0, 5, 0xA, 0xF, 8, 9); |
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GSPREC(1, 6, 0xB, 0xC, 10,11); |
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GSPREC(2, 7, 0x8, 0xD, 12,13); |
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GSPREC(3, 4, 0x9, 0xE, 14,15); |
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// round 12 |
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GSPREC(0, 4, 0x8, 0xC, 14,10); |
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GSPREC(1, 5, 0x9, 0xD, 4, 8); |
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GSPREC(2, 6, 0xA, 0xE, 9, 15); |
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GSPREC(3, 7, 0xB, 0xF, 13, 6); |
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GSPREC(0, 5, 0xA, 0xF, 1, 12); |
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GSPREC(1, 6, 0xB, 0xC, 0, 2); |
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GSPREC(2, 7, 0x8, 0xD, 11, 7); |
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GSPREC(3, 4, 0x9, 0xE, 5, 3); |
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// round 13 |
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GSPREC(0, 4, 0x8, 0xC, 11, 8); |
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GSPREC(1, 5, 0x9, 0xD, 12, 0); |
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GSPREC(2, 6, 0xA, 0xE, 5, 2); |
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GSPREC(3, 7, 0xB, 0xF, 15,13); |
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GSPREC(0, 5, 0xA, 0xF, 10,14); |
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GSPREC(1, 6, 0xB, 0xC, 3, 6); |
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GSPREC(2, 7, 0x8, 0xD, 7, 1); |
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GSPREC(3, 4, 0x9, 0xE, 9, 4); |
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#endif |
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// round 14 |
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GSPREC(0, 4, 0x8, 0xC, 7, 9); |
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GSPREC(1, 5, 0x9, 0xD, 3, 1); |
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GSPREC(2, 6, 0xA, 0xE, 13,12); |
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GSPREC(3, 7, 0xB, 0xF, 11,14); |
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GSPREC(0, 5, 0xA, 0xF, 2, 6); |
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GSPREC(2, 7, 0x8, 0xD, 4, 0); |
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if ((d_data7 ^ v[7] ^ v[15]) == 0) { |
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GSPREC(1, 6, 0xB, 0xC, 5, 10); |
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GSPREC(3, 4, 0x9, 0xE, 15, 8); |
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return (d_data6 ^ v[6] ^ v[14]); |
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} |
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return UINT32_MAX; |
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} |
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} |
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__global__ __launch_bounds__(TPB,1) |
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/* ############################################################################################################################### */ |
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void decred_gpu_hash_nonce(const uint32_t threads, const uint32_t startNonce, uint32_t *resNonce, const uint32_t highTarget) |
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// ------ Close: Last 52/64 bytes ------ |
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__global__ |
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void blake256_gpu_hash_nonce(const uint32_t threads, const uint32_t startNonce, uint32_t *resNonce, const uint64_t highTarget) |
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{ |
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{ |
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uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x); |
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const uint32_t thread = blockDim.x * blockIdx.x + threadIdx.x; |
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// if (thread < threads) |
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{ |
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const uint32_t nonce = startNonce + thread * NPR; |
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uint32_t m[16], v[16], temp; |
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const uint32_t d_data6 = d_data[6], d_data7 = d_data[7]; |
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if (thread < threads) |
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{ |
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uint32_t v[16]; |
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#pragma unroll |
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#pragma unroll |
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for(int i = 0; i < 8; i++) v[i] = d_data[i]; |
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for(int i=0;i<16;i+=4){ |
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*(uint4*)&v[i] = *(uint4*)&c_data[ i]; |
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} |
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#pragma unroll |
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const uint32_t nonce = startNonce + thread; |
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for (uint32_t i = 0; i < 16; i++) m[i] = d_data[i+8U]; |
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int i=0; |
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v[ 1]+= (nonce ^ 0x13198A2E); |
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v[ 8] = 0x243F6A88; |
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v[13] = __byte_perm(v[13] ^ v[1], 0, 0x0321); |
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v[ 9] = 0x85A308D3; |
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v[ 9]+= v[13]; |
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v[10] = 0x13198A2E; |
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v[ 5] = ROTR32(v[5] ^ v[9], 7); |
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v[11] = 0x03707344; |
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v[ 1]+= c_xors[i++];// + v[ 6]; |
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v[12] = 0xA4093822 ^ (180U*8U); |
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v[ 0]+= v[5]; |
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v[13] = 0x299F31D0 ^ (180U*8U); |
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v[12] = __byte_perm(v[12] ^ v[ 1], 0, 0x1032); v[15] = __byte_perm(v[15] ^ v[ 0], 0, 0x1032); |
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v[14] = 0x082EFA98; |
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v[11]+= v[12]; v[10]+= v[15]; |
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v[15] = 0xEC4E6C89; |
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v[ 6] = ROTR32(v[ 6] ^ v[11], 12); v[ 5] = ROTR32(v[5] ^ v[10], 12); |
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v[ 1]+= c_xors[i++] + v[ 6]; v[ 0]+= c_xors[i++] + v[ 5]; |
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// round 1 without nonce |
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v[12] = __byte_perm(v[12] ^ v[ 1], 0, 0x0321); v[15] = __byte_perm(v[15] ^ v[ 0], 0, 0x0321); |
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GSPREC(0, 4, 0x8, 0xC, 0, 1); |
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v[11]+= v[12]; v[10]+= v[15]; |
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GSPREC(2, 6, 0xA, 0xE, 4, 5); |
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v[ 6] = ROTR32(v[ 6] ^ v[11], 7); v[ 5] = ROTR32(v[ 5] ^ v[10], 7); |
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GSPREC(3, 7, 0xB, 0xF, 6, 7); |
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pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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for (m[3] = nonce; m[3] < nonce + NPR; m[3]++) { |
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// { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, |
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temp = blake256_compress_14(m, v, d_data6, d_data7); |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxory1GS2( 2, 7, 8,13, 3, 4, 9,14); |
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// { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, |
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if (temp != UINT32_MAX && cuda_swab32(temp) <= highTarget) { |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorx1GS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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#if NBN == 2 |
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// { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 }, |
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if (resNonce[0] != UINT32_MAX) resNonce[1] = m[3]; |
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pxorx1GS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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else resNonce[0] = m[3]; |
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// { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 }, |
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#else |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorx1GS2( 2, 7, 8,13, 3, 4, 9,14); |
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resNonce[0] = m[3]; |
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|
// { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 }, |
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#endif |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxory1GS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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// from alexis78: |
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// { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 }, |
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|
// return statement allows CUDA7.5 to : |
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|
pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxory1GS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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// 1. Store the values fetched from constant memory in registers. |
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|
// { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 }, |
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|
// 2. Perform more precomputations on the outside of the for loop. |
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|
pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorx1GS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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// 3. Stop the continuous fetches from the constant memory while iterating |
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|
//{ 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 }, |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxory0GS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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|
//{ 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13 , 0 }, |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorx0GS2( 2, 7, 8,13, 3, 4, 9,14); |
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//{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, |
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pxory1GS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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// { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 }, |
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pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxory1GS2( 2, 7, 8,13, 3, 4, 9,14); |
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// { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 }, |
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|
pxorGS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorx1GS2( 0, 5,10,15, 1, 6,11,12);pxorGS2( 2, 7, 8,13, 3, 4, 9,14); |
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//{ 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 } |
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|
pxorx1GS2( 0, 4, 8,12, 1, 5, 9,13);pxorGS2( 2, 6,10,14, 3, 7,11,15);pxorGS2( 0, 5,10,15, 1, 6,11,12);pxorGS( 2, 7, 8,13); |
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|
if ((c_h[1]^v[15]) == v[7]){ |
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|
v[3] += c_xors[i++] + v[4]; |
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|
v[14] = __byte_perm(v[14] ^ v[3], 0, 0x1032); |
|
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|
v[9] += v[14]; |
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|
v[4] = ROTR32(v[4] ^ v[9], 12); |
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|
v[3] += c_xors[i++] + v[4]; |
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|
v[14] = __byte_perm(v[14] ^ v[3], 0, 0x0321); |
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|
if(cuda_swab32((c_h[0]^v[6]^v[14])) <= highTarget) { |
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|
|
atomicMin(&resNonce[0], nonce); |
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|
return; |
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|
return; |
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|
} |
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|
} |
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|
} |
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|
} |
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|
@ -292,60 +180,158 @@ void blake256_gpu_hash_nonce(const uint32_t threads, const uint32_t startNonce, |
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} |
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} |
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__host__ |
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__host__ |
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static uint32_t decred_cpu_hash_nonce(const int thr_id, const uint32_t threads, const uint32_t startNonce, const uint64_t highTarget) |
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|
|
void decred_cpu_setBlock_52(const uint32_t *input){ |
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|
{ |
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|
|
/* |
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|
uint32_t result = UINT32_MAX; |
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|
Precompute everything possible and pass it on constant memory |
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const uint32_t real_threads = threads / NPR; |
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*/ |
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const sph_u32 _ALIGN(64) z[16] = { |
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dim3 grid((real_threads + TPB-1)/TPB); |
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|
SPH_C32(0x243F6A88), SPH_C32(0x85A308D3), SPH_C32(0x13198A2E), SPH_C32(0x03707344), SPH_C32(0xA4093822), SPH_C32(0x299F31D0), SPH_C32(0x082EFA98), SPH_C32(0xEC4E6C89), |
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|
dim3 block(TPB); |
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SPH_C32(0x452821E6), SPH_C32(0x38D01377), SPH_C32(0xBE5466CF), SPH_C32(0x34E90C6C), SPH_C32(0xC0AC29B7), SPH_C32(0xC97C50DD), SPH_C32(0x3F84D5B5), SPH_C32(0xB5470917) |
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}; |
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int i=0; |
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sph_u32 _ALIGN(64) preXOR[215]; |
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sph_u32 _ALIGN(64) data[16]; |
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sph_u32 _ALIGN(64) m[16]; |
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|
sph_u32 _ALIGN(64) h[ 2]; |
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|
/* Check error on Ctrl+C or kill to prevent segfaults on exit */ |
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|
if (cudaMemset(d_resNonce[thr_id], 0xff, NBN*sizeof(uint32_t)) != cudaSuccess) |
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|
return result; |
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|
blake256_gpu_hash_nonce <<<grid, block>>> (real_threads, startNonce, d_resNonce[thr_id], highTarget); |
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|
cudaThreadSynchronize(); |
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|
if (cudaSuccess == cudaMemcpy(h_resNonce[thr_id], d_resNonce[thr_id], NBN*sizeof(uint32_t), cudaMemcpyDeviceToHost)) { |
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|
|
result = h_resNonce[thr_id][0]; |
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|
#if NBN > 1 |
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|
for (int n=0; n < (NBN-1); n++) |
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|
extra_results[n] = h_resNonce[thr_id][n+1]; |
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|
#endif |
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|
|
} |
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|
return result; |
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|
} |
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|
__host__ |
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|
static void decred_midstate_128(uint32_t *output, const uint32_t *input) |
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|
|
{ |
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|
|
sph_blake256_context ctx; |
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|
|
sph_blake256_context ctx; |
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|
|
sph_blake256_set_rounds(14); |
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|
|
sph_blake256_set_rounds(14); |
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|
|
sph_blake256_init(&ctx); |
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|
|
sph_blake256_init(&ctx); |
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|
|
sph_blake256(&ctx, input, 128); |
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|
|
sph_blake256(&ctx, input, 128); |
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|
|
memcpy(output, (void*)ctx.H, 32); |
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|
|
data[ 0] = ctx.H[0]; data[ 1] = ctx.H[1]; |
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|
|
} |
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|
|
data[ 2] = ctx.H[2]; data[ 3] = ctx.H[3]; |
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|
|
data[ 4] = ctx.H[4]; data[ 5] = ctx.H[5]; |
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|
data[ 8] = ctx.H[6]; data[12] = swab32(input[35]); |
|
|
|
__host__ |
|
|
|
data[13] = ctx.H[7]; |
|
|
|
void decred_cpu_setBlock_52(uint32_t *penddata, const uint32_t *midstate, const uint32_t *ptarget) |
|
|
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|
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|
|
{ |
|
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|
|
uint32_t _ALIGN(64) data[24]; |
|
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|
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|
|
memcpy(data, midstate, 32); |
|
|
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|
|
|
|
// pre swab32 |
|
|
|
// pre swab32 |
|
|
|
for (int i=0; i<13; i++) |
|
|
|
m[ 0] = swab32(input[32]); m[ 1] = swab32(input[33]); |
|
|
|
data[8+i] = swab32(penddata[i]); |
|
|
|
m[ 2] = swab32(input[34]); m[ 3] = 0; |
|
|
|
data[21] = 0x80000001; |
|
|
|
m[ 4] = swab32(input[36]); m[ 5] = swab32(input[37]); |
|
|
|
data[22] = 0; |
|
|
|
m[ 6] = swab32(input[38]); m[ 7] = swab32(input[39]); |
|
|
|
data[23] = 0x000005a0; |
|
|
|
m[ 8] = swab32(input[40]); m[ 9] = swab32(input[41]); |
|
|
|
CUDA_SAFE_CALL(cudaMemcpyToSymbol(d_data, data, 32 + 64, 0, cudaMemcpyHostToDevice)); |
|
|
|
m[10] = swab32(input[42]); m[11] = swab32(input[43]); |
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|
|
m[12] = swab32(input[44]); m[13] = 0x80000001; |
|
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|
|
m[14] = 0; m[15] = 0x000005a0; |
|
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|
|
h[ 0] = data[ 8]; |
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|
|
h[ 1] = data[13]; |
|
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|
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|
|
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_h,h, 8, 0, cudaMemcpyHostToDevice)); |
|
|
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|
|
|
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|
|
|
|
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|
|
data[ 0]+= (m[ 0] ^ z[1]) + data[ 4]; |
|
|
|
|
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|
|
data[12] = SPH_ROTR32(z[4] ^ SPH_C32(0x5A0) ^ data[ 0], 16); |
|
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|
|
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|
|
|
|
|
|
|
data[ 8] = z[0]+data[12]; |
|
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|
|
data[ 4] = SPH_ROTR32(data[ 4] ^ data[ 8], 12); |
|
|
|
|
|
|
|
data[ 0]+= (m[ 1] ^ z[0]) + data[ 4]; |
|
|
|
|
|
|
|
data[12] = SPH_ROTR32(data[12] ^ data[ 0],8); |
|
|
|
|
|
|
|
data[ 8]+= data[12]; |
|
|
|
|
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|
|
data[ 4] = SPH_ROTR32(data[ 4] ^ data[ 8], 7); |
|
|
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|
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|
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|
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|
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|
|
data[ 1]+= (m[ 2] ^ z[3]) + data[ 5]; |
|
|
|
|
|
|
|
data[13] = SPH_ROTR32((z[5] ^ SPH_C32(0x5A0)) ^ data[ 1], 16); |
|
|
|
|
|
|
|
data[ 9] = z[1]+data[13]; |
|
|
|
|
|
|
|
data[ 5] = SPH_ROTR32(data[ 5] ^ data[ 9], 12); |
|
|
|
|
|
|
|
data[ 1]+= data[ 5]; //+nonce ^ ... |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
data[ 2]+= (m[ 4] ^ z[5]) + h[ 0]; |
|
|
|
|
|
|
|
data[14] = SPH_ROTR32(z[6] ^ data[ 2],16); |
|
|
|
|
|
|
|
data[10] = z[2] + data[14]; |
|
|
|
|
|
|
|
data[ 6] = SPH_ROTR32(h[ 0] ^ data[10], 12); |
|
|
|
|
|
|
|
data[ 2]+= (m[ 5] ^ z[4]) + data[ 6]; |
|
|
|
|
|
|
|
data[14] = SPH_ROTR32(data[14] ^ data[ 2], 8); |
|
|
|
|
|
|
|
data[10]+= data[14]; |
|
|
|
|
|
|
|
data[ 6] = SPH_ROTR32(data[ 6] ^ data[10], 7); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
data[ 3]+= (m[ 6] ^ z[7]) + h[ 1]; |
|
|
|
|
|
|
|
data[15] = SPH_ROTR32(z[7] ^ data[ 3],16); |
|
|
|
|
|
|
|
data[11] = z[3] + data[15]; |
|
|
|
|
|
|
|
data[ 7] = SPH_ROTR32(h[ 1] ^ data[11], 12); |
|
|
|
|
|
|
|
data[ 3]+= (m[ 7] ^ z[6]) + data[ 7]; |
|
|
|
|
|
|
|
data[15] = SPH_ROTR32(data[15] ^ data[ 3],8); |
|
|
|
|
|
|
|
data[11]+= data[15]; |
|
|
|
|
|
|
|
data[ 7] = SPH_ROTR32(data[11] ^ data[ 7], 7); |
|
|
|
|
|
|
|
data[ 0]+= m[ 8] ^ z[9]; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_data, data, 64, 0, cudaMemcpyHostToDevice)); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#define precalcXORGS(x,y) { \ |
|
|
|
|
|
|
|
preXOR[i++]= (m[x] ^ z[y]); \ |
|
|
|
|
|
|
|
preXOR[i++]= (m[y] ^ z[x]); \ |
|
|
|
|
|
|
|
} |
|
|
|
|
|
|
|
#define precalcXORGS2(x,y,x1,y1){\ |
|
|
|
|
|
|
|
preXOR[i++] = (m[ x] ^ z[ y]);\ |
|
|
|
|
|
|
|
preXOR[i++] = (m[x1] ^ z[y1]);\ |
|
|
|
|
|
|
|
preXOR[i++] = (m[ y] ^ z[ x]);\ |
|
|
|
|
|
|
|
preXOR[i++] = (m[y1] ^ z[x1]);\ |
|
|
|
|
|
|
|
} |
|
|
|
|
|
|
|
precalcXORGS(10,11); |
|
|
|
|
|
|
|
preXOR[ 0]+=data[ 6]; |
|
|
|
|
|
|
|
preXOR[i++] = (m[9] ^ z[8]); |
|
|
|
|
|
|
|
precalcXORGS2(12,13,14,15); |
|
|
|
|
|
|
|
precalcXORGS2(14,10, 4, 8); |
|
|
|
|
|
|
|
precalcXORGS2( 9,15,13, 6); |
|
|
|
|
|
|
|
precalcXORGS2( 1,12, 0, 2); |
|
|
|
|
|
|
|
precalcXORGS2(11, 7, 5, 3); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
precalcXORGS2(11, 8,12, 0); |
|
|
|
|
|
|
|
precalcXORGS2( 5, 2,15,13); |
|
|
|
|
|
|
|
precalcXORGS2(10,14, 3, 6); |
|
|
|
|
|
|
|
precalcXORGS2( 7, 1, 9, 4); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
precalcXORGS2( 7, 9, 3, 1); |
|
|
|
|
|
|
|
precalcXORGS2(13,12,11,14); |
|
|
|
|
|
|
|
precalcXORGS2( 2, 6, 5,10); |
|
|
|
|
|
|
|
precalcXORGS2( 4, 0,15, 8); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
precalcXORGS2( 9, 0, 5, 7); |
|
|
|
|
|
|
|
precalcXORGS2( 2, 4,10,15); |
|
|
|
|
|
|
|
precalcXORGS2(14, 1,11,12); |
|
|
|
|
|
|
|
precalcXORGS2( 6, 8, 3,13); |
|
|
|
|
|
|
|
precalcXORGS2( 2,12, 6,10); |
|
|
|
|
|
|
|
precalcXORGS2( 0,11, 8, 3); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
precalcXORGS2( 4,13, 7, 5); |
|
|
|
|
|
|
|
precalcXORGS2(15,14, 1, 9); |
|
|
|
|
|
|
|
precalcXORGS2(12, 5, 1,15); |
|
|
|
|
|
|
|
precalcXORGS2(14,13, 4,10); |
|
|
|
|
|
|
|
precalcXORGS2( 0, 7, 6, 3); |
|
|
|
|
|
|
|
precalcXORGS2( 9, 2, 8,11); |
|
|
|
|
|
|
|
precalcXORGS2(13,11, 7,14); |
|
|
|
|
|
|
|
precalcXORGS2(12, 1, 3, 9); |
|
|
|
|
|
|
|
precalcXORGS2( 5, 0,15, 4); |
|
|
|
|
|
|
|
precalcXORGS2( 8, 6, 2,10); |
|
|
|
|
|
|
|
precalcXORGS2( 6,15,14, 9); |
|
|
|
|
|
|
|
precalcXORGS2(11, 3, 0, 8); |
|
|
|
|
|
|
|
precalcXORGS2(12, 2,13, 7); |
|
|
|
|
|
|
|
precalcXORGS2( 1, 4,10, 5); |
|
|
|
|
|
|
|
precalcXORGS2(10, 2, 8, 4); |
|
|
|
|
|
|
|
precalcXORGS2( 7, 6, 1, 5); |
|
|
|
|
|
|
|
precalcXORGS2(15,11, 9,14); |
|
|
|
|
|
|
|
precalcXORGS2( 3,12,13, 0); |
|
|
|
|
|
|
|
precalcXORGS2( 0, 1, 2, 3); |
|
|
|
|
|
|
|
precalcXORGS2( 4, 5, 6, 7); |
|
|
|
|
|
|
|
precalcXORGS2( 8, 9,10,11); |
|
|
|
|
|
|
|
precalcXORGS2(12,13,14,15); |
|
|
|
|
|
|
|
precalcXORGS2(14,10, 4, 8); |
|
|
|
|
|
|
|
precalcXORGS2( 9,15,13, 6); |
|
|
|
|
|
|
|
precalcXORGS2( 1,12, 0, 2); |
|
|
|
|
|
|
|
precalcXORGS2(11, 7, 5, 3); |
|
|
|
|
|
|
|
precalcXORGS2(11, 8,12, 0); |
|
|
|
|
|
|
|
precalcXORGS2( 5, 2,15,13); |
|
|
|
|
|
|
|
precalcXORGS2(10,14, 3, 6); |
|
|
|
|
|
|
|
precalcXORGS2( 7, 1, 9, 4); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
precalcXORGS2( 7, 9, 3, 1); |
|
|
|
|
|
|
|
precalcXORGS2(13,12,11,14); |
|
|
|
|
|
|
|
precalcXORGS2( 2, 6, 5,10); |
|
|
|
|
|
|
|
precalcXORGS( 4, 0); |
|
|
|
|
|
|
|
precalcXORGS(15, 8); |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_xors, preXOR, 215*sizeof(uint32_t), 0, cudaMemcpyHostToDevice)); |
|
|
|
} |
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* ############################################################################################################################### */ |
|
|
|
/* ############################################################################################################################### */ |
|
|
|
|
|
|
|
|
|
|
@ -357,31 +343,29 @@ static bool init[MAX_GPUS] = { 0 }; |
|
|
|
extern "C" int scanhash_decred(int thr_id, struct work* work, uint32_t max_nonce, unsigned long *hashes_done) |
|
|
|
extern "C" int scanhash_decred(int thr_id, struct work* work, uint32_t max_nonce, unsigned long *hashes_done) |
|
|
|
{ |
|
|
|
{ |
|
|
|
uint32_t _ALIGN(64) endiandata[48]; |
|
|
|
uint32_t _ALIGN(64) endiandata[48]; |
|
|
|
uint32_t _ALIGN(64) midstate[8]; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
uint32_t *pdata = work->data; |
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uint32_t *pdata = work->data; |
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uint32_t *ptarget = work->target; |
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uint32_t *ptarget = work->target; |
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uint32_t *pnonce = &pdata[DCR_NONCE_OFT32]; |
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uint32_t *pnonce = &pdata[DCR_NONCE_OFT32]; |
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const uint32_t first_nonce = *pnonce; |
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const uint32_t first_nonce = *pnonce; |
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uint64_t targetHigh = ((uint64_t*)ptarget)[3]; |
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const uint32_t targetHigh = (opt_benchmark?0x1ULL:ptarget[6]); |
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const int dev_id = device_map[thr_id]; |
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int dev_id = device_map[thr_id]; |
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int intensity = (device_sm[dev_id] > 500 && !is_windows()) ? 29 : 25; |
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int intensity = (device_sm[dev_id] > 500 && !is_windows()) ? 29 : 25; |
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if (device_sm[dev_id] < 350) intensity = 22; |
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if (device_sm[dev_id] < 350) intensity = 22; |
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uint32_t throughput = cuda_default_throughput(thr_id, 1U << intensity); |
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uint32_t throughput = cuda_default_throughput(thr_id, 1U << intensity); |
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if (init[thr_id]) throughput = min(throughput, max_nonce - first_nonce); |
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if (init[thr_id]) throughput = min(throughput, max_nonce - first_nonce); |
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const dim3 grid((throughput + TPB-1)/(TPB)); |
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const dim3 block(TPB); |
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int rc = 0; |
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int rc = 0; |
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if (opt_benchmark) { |
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if (opt_benchmark) { |
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targetHigh = 0x1ULL << 32; |
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ptarget[6] = swab32(0xff); |
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ptarget[6] = swab32(0xff); |
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} |
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} |
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if (!init[thr_id]) { |
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if (!init[thr_id]) |
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{ |
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cudaSetDevice(dev_id); |
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cudaSetDevice(dev_id); |
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if (opt_cudaschedule == -1 && gpu_threads == 1) { |
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if (opt_cudaschedule == -1 && gpu_threads == 1) { |
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cudaDeviceReset(); |
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cudaDeviceReset(); |
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@ -391,67 +375,38 @@ extern "C" int scanhash_decred(int thr_id, struct work* work, uint32_t max_nonce |
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CUDA_LOG_ERROR(); |
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CUDA_LOG_ERROR(); |
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} |
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} |
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CUDA_CALL_OR_RET_X(cudaMalloc(&d_resNonce[thr_id], NBN * sizeof(uint32_t)), -1); |
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CUDA_CALL_OR_RET_X(cudaMalloc(&d_resNonce[thr_id], sizeof(uint32_t)), -1); |
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CUDA_CALL_OR_RET_X(cudaMallocHost(&h_resNonce[thr_id], NBN * sizeof(uint32_t)), -1); |
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CUDA_CALL_OR_RET_X(cudaMallocHost(&h_resNonce[thr_id], sizeof(uint32_t)), -1); |
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init[thr_id] = true; |
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init[thr_id] = true; |
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} |
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} |
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cudaMemset(d_resNonce[thr_id], 0xff, sizeof(uint32_t)); |
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memcpy(endiandata, pdata, 180); |
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memcpy(endiandata, pdata, 180); |
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decred_midstate_128(midstate, endiandata); |
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decred_cpu_setBlock_52(&pdata[32], midstate, ptarget); |
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decred_cpu_setBlock_52(endiandata); |
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do { |
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do { |
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// GPU HASH |
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// GPU HASH |
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uint32_t foundNonce = decred_cpu_hash_nonce(thr_id, throughput, (*pnonce), targetHigh); |
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decred_gpu_hash_nonce <<<grid, block>>> (throughput, (*pnonce), d_resNonce[thr_id], targetHigh); |
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cudaThreadSynchronize(); |
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if (foundNonce != UINT32_MAX) |
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cudaMemcpy(h_resNonce[thr_id], d_resNonce[thr_id], sizeof(uint32_t), cudaMemcpyDeviceToHost); |
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{ |
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if (h_resNonce[thr_id][0] != UINT32_MAX) { |
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uint32_t vhashcpu[8]; |
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rc = 1; |
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uint32_t Htarg = ptarget[6]; |
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// work_set_target_ratio(work, vhashcpu); |
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*hashes_done = (*pnonce) - first_nonce + throughput; |
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be32enc(&endiandata[DCR_NONCE_OFT32], foundNonce); |
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work->nonces[0] = swab32(h_resNonce[thr_id][0]); |
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decred_hash(vhashcpu, endiandata); |
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*pnonce = work->nonces[0]; |
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return 1; |
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if (vhashcpu[6] <= Htarg && fulltest(vhashcpu, ptarget)) |
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{ |
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rc = 1; |
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work_set_target_ratio(work, vhashcpu); |
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*hashes_done = (*pnonce) - first_nonce + throughput; |
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work->nonces[0] = swab32(foundNonce); |
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#if NBN > 1 |
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if (extra_results[0] != UINT32_MAX) { |
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be32enc(&endiandata[DCR_NONCE_OFT32], extra_results[0]); |
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decred_hash(vhashcpu, endiandata); |
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if (vhashcpu[6] <= Htarg && fulltest(vhashcpu, ptarget)) { |
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work->nonces[1] = swab32(extra_results[0]); |
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if (bn_hash_target_ratio(vhashcpu, ptarget) > work->shareratio) { |
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work_set_target_ratio(work, vhashcpu); |
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xchg(work->nonces[1], work->nonces[0]); |
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} |
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rc = 2; |
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} |
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extra_results[0] = UINT32_MAX; |
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} |
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#endif |
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*pnonce = work->nonces[0]; |
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return rc; |
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} |
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else if (opt_debug) { |
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applog_hash(ptarget); |
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applog_compare_hash(vhashcpu, ptarget); |
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gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU!", foundNonce); |
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} |
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} |
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} |
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*pnonce += throughput; |
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*pnonce += throughput; |
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} while (!work_restart[thr_id].restart && max_nonce > (uint64_t)throughput + (*pnonce)); |
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} while (!work_restart[thr_id].restart && (uint64_t)max_nonce > (uint64_t)throughput + (uint64_t)(*pnonce)); |
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*hashes_done = (*pnonce) - first_nonce; |
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*hashes_done = (*pnonce) - first_nonce; |
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MyStreamSynchronize(NULL, 0, device_map[thr_id]); |
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return rc; |
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return rc; |
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} |
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} |
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// cleanup |
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|
// cleanup |
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|
|
extern "C" void free_decred(int thr_id) |
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|
|
extern "C" void free_decred(int thr_id) |
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|
|
{ |
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|
{ |
|
|
@ -459,7 +414,6 @@ extern "C" void free_decred(int thr_id) |
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|
return; |
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|
|
return; |
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|
cudaDeviceSynchronize(); |
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|
|
cudaDeviceSynchronize(); |
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|
cudaFreeHost(h_resNonce[thr_id]); |
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|
|
cudaFreeHost(h_resNonce[thr_id]); |
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|
|
cudaFree(d_resNonce[thr_id]); |
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|
|
cudaFree(d_resNonce[thr_id]); |
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