mirror of
https://github.com/GOSTSec/ccminer
synced 2025-01-22 04:24:29 +00:00
myr-gr: handle a second nonce & more cleanup
This commit is contained in:
Tanguy Pruvot
parent
374174c7c8
commit
06e2485128
@ -8,6 +8,7 @@
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#ifdef __INTELLISENSE__
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#define __CUDA_ARCH__ 500
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#define __funnelshift_r(x,y,n) (x >> n)
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#define atomicExch(p,x) x
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#endif
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#if __CUDA_ARCH__ >= 300
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@ -17,10 +18,10 @@
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#endif
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// globaler Speicher für alle HeftyHashes aller Threads
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__constant__ uint32_t pTarget[8]; // Single GPU
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static uint32_t *d_outputHashes[MAX_GPUS];
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static uint32_t *d_resultNonce[MAX_GPUS];
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static uint32_t *d_resultNonces[MAX_GPUS];
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__constant__ uint32_t pTarget[2]; // Same for all GPU
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__constant__ uint32_t myriadgroestl_gpu_msg[32];
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// muss expandiert werden
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@ -67,33 +68,25 @@ const uint32_t myr_sha256_cpu_w2Table[] = {
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#define s0(x) (ROTR32(x, 7) ^ ROTR32(x, 18) ^ R(x, 3))
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#define s1(x) (ROTR32(x, 17) ^ ROTR32(x, 19) ^ R(x, 10))
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__device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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__device__ __forceinline__
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void myriadgroestl_gpu_sha256(uint32_t *message)
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{
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uint32_t regs[8], hash[8];
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const uint32_t myr_sha256_gpu_hashTable[8] = {
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0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a, 0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19
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};
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// pre
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#pragma unroll 8
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for (int k=0; k < 8; k++)
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{
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regs[k] = myr_sha256_gpu_hashTable[k];
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hash[k] = regs[k];
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}
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uint32_t W1[16];
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#pragma unroll 16
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#pragma unroll
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for(int k=0; k<16; k++)
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W1[k] = SWAB32(message[k]);
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uint32_t regs[8] = {
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0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a,
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0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19
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};
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// Progress W1
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#pragma unroll 16
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#pragma unroll
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for(int j=0; j<16; j++)
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{
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uint32_t T1, T2;
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T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j] + W1[j];
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T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j] + W1[j];
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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#pragma unroll 7
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for (int k=6; k >= 0; k--) regs[k+1] = regs[k];
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@ -105,27 +98,26 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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uint32_t W2[16];
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////// PART 1
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#pragma unroll 2
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#pragma unroll
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for(int j=0; j<2; j++)
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W2[j] = s1(W1[14+j]) + W1[9+j] + s0(W1[1+j]) + W1[j];
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#pragma unroll 5
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for(int j=2;j<7;j++)
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for(int j=2; j<7;j++)
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W2[j] = s1(W2[j-2]) + W1[9+j] + s0(W1[1+j]) + W1[j];
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#pragma unroll 8
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#pragma unroll
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for(int j=7; j<15; j++)
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W2[j] = s1(W2[j-2]) + W2[j-7] + s0(W1[1+j]) + W1[j];
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W2[15] = s1(W2[13]) + W2[8] + s0(W2[0]) + W1[15];
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// Round function
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#pragma unroll 16
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#pragma unroll
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for(int j=0; j<16; j++)
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{
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uint32_t T1, T2;
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T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 16] + W2[j];
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T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 16] + W2[j];
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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#pragma unroll 7
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l];
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@ -134,26 +126,25 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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}
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////// PART 2
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#pragma unroll 2
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#pragma unroll
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for(int j=0; j<2; j++)
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W1[j] = s1(W2[14+j]) + W2[9+j] + s0(W2[1+j]) + W2[j];
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#pragma unroll 5
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for(int j=2; j<7; j++)
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W1[j] = s1(W1[j-2]) + W2[9+j] + s0(W2[1+j]) + W2[j];
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#pragma unroll 8
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#pragma unroll
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for(int j=7; j<15; j++)
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W1[j] = s1(W1[j-2]) + W1[j-7] + s0(W2[1+j]) + W2[j];
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W1[15] = s1(W1[13]) + W1[8] + s0(W1[0]) + W2[15];
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// Round function
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#pragma unroll 16
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#pragma unroll
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for(int j=0; j<16; j++)
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{
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uint32_t T1, T2;
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T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 32] + W1[j];
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T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 32] + W1[j];
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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#pragma unroll 7
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l];
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@ -162,26 +153,26 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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}
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////// PART 3
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#pragma unroll 2
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#pragma unroll
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for(int j=0; j<2; j++)
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W2[j] = s1(W1[14+j]) + W1[9+j] + s0(W1[1+j]) + W1[j];
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#pragma unroll 5
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for(int j=2; j<7; j++)
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W2[j] = s1(W2[j-2]) + W1[9+j] + s0(W1[1+j]) + W1[j];
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#pragma unroll 8
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#pragma unroll
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for(int j=7; j<15; j++)
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W2[j] = s1(W2[j-2]) + W2[j-7] + s0(W1[1+j]) + W1[j];
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W2[15] = s1(W2[13]) + W2[8] + s0(W2[0]) + W1[15];
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// Round function
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#pragma unroll 16
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#pragma unroll
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for(int j=0; j<16; j++)
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{
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uint32_t T1, T2;
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T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 48] + W2[j];
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T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable[j + 48] + W2[j];
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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#pragma unroll 7
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for (int l=6; l >= 0; l--) regs[l+1] = regs[l];
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@ -189,6 +180,11 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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regs[4] += T1;
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}
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uint32_t hash[8] = {
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0x6a09e667, 0xbb67ae85, 0x3c6ef372, 0xa54ff53a,
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0x510e527f, 0x9b05688c, 0x1f83d9ab, 0x5be0cd19
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};
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#pragma unroll 8
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for(int k=0; k<8; k++)
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hash[k] += regs[k];
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@ -196,17 +192,16 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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/////
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///// 2nd Round (wegen Msg-Padding)
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/////
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#pragma unroll 8
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#pragma unroll
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for(int k=0; k<8; k++)
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regs[k] = hash[k];
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// Progress W1
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#pragma unroll 64
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#pragma unroll
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for(int j=0; j<64; j++)
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{
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uint32_t T1, T2;
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T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable2[j];
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T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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uint32_t T1 = regs[7] + S1(regs[4]) + Ch(regs[4], regs[5], regs[6]) + myr_sha256_gpu_constantTable2[j];
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uint32_t T2 = S0(regs[0]) + Maj(regs[0], regs[1], regs[2]);
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#pragma unroll 7
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for (int k=6; k >= 0; k--) regs[k+1] = regs[k];
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@ -214,15 +209,48 @@ __device__ void myriadgroestl_gpu_sha256(uint32_t *message)
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regs[4] += T1;
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}
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#pragma unroll 8
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#if 0
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// Full sha hash
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#pragma unroll
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for(int k=0; k<8; k++)
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hash[k] += regs[k];
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//// Close
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#pragma unroll 8
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#pragma unroll
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for(int k=0; k<8; k++)
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message[k] = SWAB32(hash[k]);
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#else
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message[6] = SWAB32(hash[6] + regs[6]);
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message[7] = SWAB32(hash[7] + regs[7]);
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#endif
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}
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__global__
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//__launch_bounds__(256, 6) // we want <= 40 regs
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void myriadgroestl_gpu_hash_sha(uint32_t threads, uint32_t startNounce, uint32_t *hashBuffer, uint32_t *resNonces)
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{
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#if __CUDA_ARCH__ >= 300
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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const uint32_t nonce = startNounce + thread;
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uint32_t out_state[16];
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uint32_t *inpHash = &hashBuffer[16 * thread];
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#pragma unroll 16
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for (int i=0; i < 16; i++)
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out_state[i] = inpHash[i];
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myriadgroestl_gpu_sha256(out_state);
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if (out_state[7] <= pTarget[1] && out_state[6] <= pTarget[0])
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{
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uint32_t tmp = atomicExch(&resNonces[0], nonce);
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if (tmp != UINT32_MAX)
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resNonces[1] = tmp;
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}
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}
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#endif
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}
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__global__
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@ -248,7 +276,6 @@ void myriadgroestl_gpu_hash_quad(uint32_t threads, uint32_t startNounce, uint32_
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to_bitslice_quad(paddedInput, msgBitsliced);
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uint32_t state[8];
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groestl512_progressMessage_quad(state, msgBitsliced);
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uint32_t out_state[16];
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@ -264,49 +291,6 @@ void myriadgroestl_gpu_hash_quad(uint32_t threads, uint32_t startNounce, uint32_
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#endif
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}
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__global__
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void myriadgroestl_gpu_hash_quad2(uint32_t threads, uint32_t startNounce, uint32_t *resNounce, uint32_t *hashBuffer)
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{
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#if __CUDA_ARCH__ >= 300
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uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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uint32_t nounce = startNounce + thread;
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uint32_t out_state[16];
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uint32_t *inpHash = &hashBuffer[16 * thread];
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#pragma unroll 16
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for (int i=0; i < 16; i++)
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out_state[i] = inpHash[i];
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myriadgroestl_gpu_sha256(out_state);
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int i, position = -1;
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bool rc = true;
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#pragma unroll 8
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for (i = 7; i >= 0; i--) {
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if (out_state[i] > pTarget[i]) {
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if(position < i) {
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position = i;
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rc = false;
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}
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}
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if (out_state[i] < pTarget[i]) {
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if(position < i) {
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position = i;
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rc = true;
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}
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}
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}
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if(rc && resNounce[0] > nounce)
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resNounce[0] = nounce;
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}
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#endif
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}
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// Setup Function
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__host__
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void myriadgroestl_cpu_init(int thr_id, uint32_t threads)
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@ -315,9 +299,7 @@ void myriadgroestl_cpu_init(int thr_id, uint32_t threads)
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for(int i=0; i<64; i++)
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temp[i] = myr_sha256_cpu_w2Table[i] + myr_sha256_cpu_constantTable[i];
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cudaMemcpyToSymbol( myr_sha256_gpu_constantTable2,
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temp,
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sizeof(uint32_t) * 64 );
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cudaMemcpyToSymbol( myr_sha256_gpu_constantTable2, temp, sizeof(uint32_t) * 64 );
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cudaMemcpyToSymbol( myr_sha256_gpu_constantTable,
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myr_sha256_cpu_constantTable,
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@ -327,36 +309,26 @@ void myriadgroestl_cpu_init(int thr_id, uint32_t threads)
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cuda_get_arch(thr_id);
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cudaMalloc(&d_outputHashes[thr_id], (size_t) 64 * threads);
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cudaMalloc(&d_resultNonce[thr_id], sizeof(uint32_t));
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cudaMalloc(&d_resultNonces[thr_id], 2 * sizeof(uint32_t));
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}
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__host__
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void myriadgroestl_cpu_free(int thr_id)
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{
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cudaFree(d_outputHashes[thr_id]);
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cudaFree(d_resultNonce[thr_id]);
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cudaFree(d_resultNonces[thr_id]);
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}
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__host__
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void myriadgroestl_cpu_setBlock(int thr_id, void *data, void *pTargetIn)
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void myriadgroestl_cpu_setBlock(int thr_id, void *data, uint32_t *pTargetIn)
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{
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// Nachricht expandieren und setzen
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uint32_t msgBlock[32] = { 0 };
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memcpy(&msgBlock[0], data, 80);
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// Erweitere die Nachricht auf den Nachrichtenblock (padding)
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// Unsere Nachricht hat 80 Byte
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msgBlock[20] = 0x80;
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msgBlock[31] = 0x01000000;
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// groestl512 braucht hierfür keinen CPU-Code (die einzige Runde wird
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// auf der GPU ausgeführt)
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// Blockheader setzen (korrekte Nonce und Hefty Hash fehlen da drin noch)
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cudaMemcpyToSymbol(myriadgroestl_gpu_msg, msgBlock, 128);
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cudaMemset(d_resultNonce[thr_id], 0xFF, sizeof(uint32_t));
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cudaMemcpyToSymbol(pTarget, pTargetIn, 32);
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cudaMemcpyToSymbol(pTarget, &pTargetIn[6], 2 * sizeof(uint32_t));
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}
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__host__
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@ -364,26 +336,25 @@ void myriadgroestl_cpu_hash(int thr_id, uint32_t threads, uint32_t startNounce,
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{
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uint32_t threadsperblock = 256;
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cudaMemset(d_resultNonces[thr_id], 0xFF, 2 * sizeof(uint32_t));
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// Compute 3.0 benutzt die registeroptimierte Quad Variante mit Warp Shuffle
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// mit den Quad Funktionen brauchen wir jetzt 4 threads pro Hash, daher Faktor 4 bei der Blockzahl
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const int factor = 4;
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cudaMemset(d_resultNonce[thr_id], 0xFF, sizeof(uint32_t));
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// berechne wie viele Thread Blocks wir brauchen
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dim3 grid(factor*((threads + threadsperblock-1)/threadsperblock));
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dim3 block(threadsperblock);
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if (device_sm[device_map[thr_id]] < 300) {
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int dev_id = device_map[thr_id];
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if (device_sm[dev_id] < 300 || cuda_arch[dev_id] < 300) {
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printf("Sorry, This algo is not supported by this GPU arch (SM 3.0 required)");
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return;
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}
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myriadgroestl_gpu_hash_quad <<< grid, block >>> (threads, startNounce, d_outputHashes[thr_id]);
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dim3 grid2((threads + threadsperblock-1)/threadsperblock);
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myriadgroestl_gpu_hash_quad2 <<< grid2, block >>> (threads, startNounce, d_resultNonce[thr_id], d_outputHashes[thr_id]);
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myriadgroestl_gpu_hash_sha <<< grid2, block >>> (threads, startNounce, d_outputHashes[thr_id], d_resultNonces[thr_id]);
|
||||
|
||||
// Strategisches Sleep Kommando zur Senkung der CPU Last
|
||||
//MyStreamSynchronize(NULL, 0, thr_id);
|
||||
|
||||
cudaMemcpy(resNounce, d_resultNonce[thr_id], sizeof(uint32_t), cudaMemcpyDeviceToHost);
|
||||
cudaMemcpy(resNounce, d_resultNonces[thr_id], 2 * sizeof(uint32_t), cudaMemcpyDeviceToHost);
|
||||
}
|
||||
|
||||
@ -9,8 +9,8 @@
|
||||
|
||||
void myriadgroestl_cpu_init(int thr_id, uint32_t threads);
|
||||
void myriadgroestl_cpu_free(int thr_id);
|
||||
void myriadgroestl_cpu_setBlock(int thr_id, void *data, void *pTargetIn);
|
||||
void myriadgroestl_cpu_hash(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *nounce);
|
||||
void myriadgroestl_cpu_setBlock(int thr_id, void *data, uint32_t *target);
|
||||
void myriadgroestl_cpu_hash(int thr_id, uint32_t threads, uint32_t startNonce, uint32_t *resNonces);
|
||||
|
||||
void myriadhash(void *state, const void *input)
|
||||
{
|
||||
@ -62,27 +62,37 @@ int scanhash_myriad(int thr_id, struct work *work, uint32_t max_nonce, unsigned
|
||||
for (int k=0; k < 20; k++)
|
||||
be32enc(&endiandata[k], pdata[k]);
|
||||
|
||||
myriadgroestl_cpu_setBlock(thr_id, endiandata, (void*)ptarget);
|
||||
myriadgroestl_cpu_setBlock(thr_id, endiandata, ptarget);
|
||||
|
||||
do {
|
||||
// GPU
|
||||
uint32_t foundNounce = UINT32_MAX;
|
||||
uint32_t foundNonces[2] = { UINT32_MAX, UINT32_MAX };
|
||||
|
||||
myriadgroestl_cpu_hash(thr_id, throughput, pdata[19], &foundNounce);
|
||||
myriadgroestl_cpu_hash(thr_id, throughput, pdata[19], foundNonces);
|
||||
|
||||
*hashes_done = pdata[19] - start_nonce + throughput;
|
||||
|
||||
if (foundNounce < UINT32_MAX && bench_algo < 0)
|
||||
if (foundNonces[0] < UINT32_MAX && bench_algo < 0)
|
||||
{
|
||||
uint32_t _ALIGN(64) vhash[8];
|
||||
endiandata[19] = swab32(foundNounce);
|
||||
endiandata[19] = swab32(foundNonces[0]);
|
||||
myriadhash(vhash, endiandata);
|
||||
if (vhash[7] <= ptarget[7] && fulltest(vhash, ptarget)) {
|
||||
work_set_target_ratio(work, vhash);
|
||||
pdata[19] = foundNounce;
|
||||
pdata[19] = foundNonces[0];
|
||||
// search for another nonce
|
||||
if (foundNonces[1] != UINT32_MAX) {
|
||||
endiandata[19] = swab32(foundNonces[1]);
|
||||
myriadhash(vhash, endiandata);
|
||||
pdata[21] = foundNonces[1];
|
||||
if(bn_hash_target_ratio(vhash, ptarget) > work->shareratio) {
|
||||
work_set_target_ratio(work, vhash);
|
||||
}
|
||||
return 2;
|
||||
}
|
||||
return 1;
|
||||
} else if (vhash[7] > ptarget[7]) {
|
||||
gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU!", foundNounce);
|
||||
gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU!", foundNonces[0]);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user