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/* Ziftrcoin ZR5 CUDA Implementation, (c) tpruvot 2015 */
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extern "C" {
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#include "sph/sph_blake.h"
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#include "sph/sph_groestl.h"
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#include "sph/sph_skein.h"
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#include "sph/sph_jh.h"
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#include "sph/sph_keccak.h"
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}
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#include "miner.h"
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#include "cuda_helper.h"
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#include <stdio.h>
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#include <memory.h>
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#define ZR_BLAKE 0
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#define ZR_GROESTL 1
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#define ZR_JH512 2
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#define ZR_SKEIN 3
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#define POK_BOOL_MASK 0x00008000
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#define POK_DATA_MASK 0xFFFF0000
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static uint32_t* d_hash[MAX_GPUS];
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static uint16_t* d_poks[MAX_GPUS];
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static uint32_t**d_buffers[MAX_GPUS];
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static uint8_t* d_permut[MAX_GPUS];
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static uint32_t* d_blake[MAX_GPUS];
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static uint32_t* d_groes[MAX_GPUS];
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static uint32_t* d_jh512[MAX_GPUS];
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static uint32_t* d_skein[MAX_GPUS];
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static uint8_t* d_txs[MAX_GPUS];
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__constant__ uint16_t c_txlens[POK_MAX_TXS];
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__constant__ uint8_t c_permut[24][4];
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static const uint8_t permut[24][4] = {
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{0, 1, 2, 3},
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{0, 1, 3, 2},
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{0, 2, 1, 3},
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{0, 2, 3, 1},
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{0, 3, 1, 2},
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{0, 3, 2, 1},
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{1, 0, 2, 3},
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{1, 0, 3, 2},
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{1, 2, 0, 3},
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{1, 2, 3, 0},
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{1, 3, 0, 2},
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{1, 3, 2, 0},
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{2, 0, 1, 3},
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{2, 0, 3, 1},
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{2, 1, 0, 3},
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{2, 1, 3, 0},
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{2, 3, 0, 1},
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{2, 3, 1, 0},
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{3, 0, 1, 2},
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{3, 0, 2, 1},
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{3, 1, 0, 2},
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{3, 1, 2, 0},
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{3, 2, 0, 1},
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{3, 2, 1, 0}
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};
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// CPU HASH
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extern "C" void zr5hash(void *output, const void *input)
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{
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sph_keccak512_context ctx_keccak;
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sph_blake512_context ctx_blake;
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sph_groestl512_context ctx_groestl;
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sph_jh512_context ctx_jh;
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sph_skein512_context ctx_skein;
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uchar _ALIGN(64) hash[64];
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uint32_t *phash = (uint32_t *) hash;
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uint32_t norder;
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sph_keccak512_init(&ctx_keccak);
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sph_keccak512(&ctx_keccak, (const void*) input, 80);
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sph_keccak512_close(&ctx_keccak, (void*) phash);
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norder = phash[0] % ARRAY_SIZE(permut); /* % 24 */
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for(int i = 0; i < 4; i++)
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{
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switch (permut[norder][i]) {
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case ZR_BLAKE:
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sph_blake512_init(&ctx_blake);
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sph_blake512(&ctx_blake, (const void*) phash, 64);
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sph_blake512_close(&ctx_blake, phash);
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break;
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case ZR_GROESTL:
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sph_groestl512_init(&ctx_groestl);
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sph_groestl512(&ctx_groestl, (const void*) phash, 64);
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sph_groestl512_close(&ctx_groestl, phash);
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break;
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case ZR_JH512:
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sph_jh512_init(&ctx_jh);
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sph_jh512(&ctx_jh, (const void*) phash, 64);
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sph_jh512_close(&ctx_jh, phash);
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break;
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case ZR_SKEIN:
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sph_skein512_init(&ctx_skein);
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sph_skein512(&ctx_skein, (const void*) phash, 64);
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sph_skein512_close(&ctx_skein, phash);
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break;
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default:
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break;
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}
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}
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memcpy(output, phash, 32);
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}
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extern "C" void zr5hash_pok(void *output, uint32_t *pdata)
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{
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uint32_t _ALIGN(64) hash[8];
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const uint32_t version = (pdata[0] & (~POK_DATA_MASK)) | (use_pok ? POK_BOOL_MASK : 0);
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pdata[0] = version;
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zr5hash(hash, pdata);
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// fill PoK
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pdata[0] = version | (hash[0] & POK_DATA_MASK);
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zr5hash(hash, pdata);
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memcpy(output, hash, 32);
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}
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// ------------------------------------------------------------------------------------------------
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__global__ __launch_bounds__(128, 8)
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void zr5_init_vars_gpu(uint32_t threads, uint32_t* d_hash, uint8_t* d_permut, uint32_t** d_buffers,
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uint32_t* d_blake, uint32_t* d_groes, uint32_t* d_jh512, uint32_t* d_skein)
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{
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uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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uint32_t offset = thread * 16U; // 64U / sizeof(uint32_t);
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uint32_t *phash = &d_hash[offset];
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// store the algos order for other procs
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const uint8_t norder = (phash[0] % ARRAY_SIZE(permut));
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const uint8_t algo = c_permut[norder][0];
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d_permut[thread] = norder;
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// init array for other procs
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d_buffers[0] = d_blake;
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d_buffers[1] = d_groes;
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d_buffers[2] = d_jh512;
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d_buffers[3] = d_skein;
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// Copy From d_hash to the first algo buffer
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// uint4 = 4x uint32_t = 16 bytes
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uint4 *psrc = (uint4*) phash;
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uint4 *pdst = (uint4*) (d_buffers[algo] + offset);
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pdst[0] = psrc[0];
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pdst[1] = psrc[1];
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pdst[2] = psrc[2];
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pdst[3] = psrc[3];
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}
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}
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__host__
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void zr5_init_vars(int thr_id, uint32_t threads)
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{
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const uint32_t threadsperblock = 128;
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dim3 grid((threads + threadsperblock - 1) / threadsperblock);
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dim3 block(threadsperblock);
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zr5_init_vars_gpu <<<grid, block>>> (
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threads, d_hash[thr_id], d_permut[thr_id], d_buffers[thr_id],
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d_blake[thr_id], d_groes[thr_id], d_jh512[thr_id], d_skein[thr_id]
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);
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}
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__global__ __launch_bounds__(128, 8)
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void zr5_move_data_to_hash_gpu(const uint32_t threads, const int rnd, uint32_t** const d_buffers, uint8_t *d_permut, uint32_t *d_hash)
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{
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// copy 64 bytes hash from/to the right algo buffers
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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const uint8_t norder = d_permut[thread];
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const uint8_t algodst = c_permut[norder][rnd];
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const uint8_t algosrc = c_permut[norder][rnd-1];
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const uint32_t offset = thread * (64 / 4);
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// uint4 = 4x uint32_t = 16 bytes
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uint4 *psrc = (uint4*) (d_buffers[algosrc] + offset);
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uint4 *pdst = (uint4*) (d_buffers[algodst] + offset);
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pdst[0] = psrc[0];
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pdst[1] = psrc[1];
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pdst[2] = psrc[2];
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pdst[3] = psrc[3];
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}
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}
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__host__
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void zr5_move_data_to_hash(int thr_id, uint32_t threads, int rnd)
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{
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const uint32_t threadsperblock = 128;
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dim3 grid((threads + threadsperblock - 1) / threadsperblock);
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dim3 block(threadsperblock);
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zr5_move_data_to_hash_gpu <<<grid, block>>> (threads, rnd, d_buffers[thr_id], d_permut[thr_id], d_hash[thr_id]);
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}
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__global__ __launch_bounds__(128, 8)
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void zr5_get_poks_gpu(uint32_t threads, uint32_t** const d_buffers, uint8_t* const d_permut, uint16_t *d_poks)
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{
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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const uint8_t norder = d_permut[thread];
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const uint8_t algosrc = c_permut[norder][3];
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// copy only pok
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const uint32_t offset = thread * 16U; // 64 / 4;
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uint16_t* hash0 = (uint16_t*) (d_buffers[algosrc] + offset);
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d_poks[thread] = hash0[1];
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}
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}
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__global__ __launch_bounds__(128, 4)
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void zr5_get_poks_xor_gpu(uint32_t threads, uint32_t** const d_buffers, uint8_t* d_permut, uint16_t* d_poks, uint8_t* d_txs, uint8_t txs)
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{
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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const uint8_t norder = d_permut[thread];
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const uint8_t algo = c_permut[norder][3];
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const uint8_t ntx = norder % txs; // generally 0 on testnet...
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const uint32_t offset = thread * 16U; // 64 / 4;
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uint32_t* hash = (uint32_t*) (d_buffers[algo] + offset);
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uint32_t randNdx = hash[1] % c_txlens[ntx];
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uint8_t* ptx = &d_txs[POK_MAX_TX_SZ*ntx] + randNdx;
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uint32_t x = 0x100UL * ptx[3] + ptx[2];
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d_poks[thread] = x ^ (hash[2] >> 16);
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}
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}
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__host__
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void zr5_get_poks(int thr_id, uint32_t threads, uint16_t* d_poks, struct work* work)
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{
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const uint32_t threadsperblock = 128;
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dim3 grid((threads + threadsperblock - 1) / threadsperblock);
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dim3 block(threadsperblock);
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uint8_t txs = (uint8_t) work->tx_count;
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if (txs && use_pok)
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{
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uint32_t txlens[POK_MAX_TXS];
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uint8_t* txdata = (uint8_t*) calloc(POK_MAX_TXS, POK_MAX_TX_SZ);
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if (!txdata) {
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applog(LOG_ERR, "%s: error, memory alloc failure", __func__);
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return;
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}
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// create blocs to copy on device
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for (uint8_t tx=0; tx < txs; tx++) {
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txlens[tx] = (uint32_t) (work->txs[tx].len - 3U);
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memcpy(&txdata[POK_MAX_TX_SZ*tx], work->txs[tx].data, min(POK_MAX_TX_SZ, txlens[tx]+3U));
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}
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cudaMemcpy(d_txs[thr_id], txdata, txs * POK_MAX_TX_SZ, cudaMemcpyHostToDevice);
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CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_txlens, txlens, txs * sizeof(uint32_t), 0, cudaMemcpyHostToDevice));
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zr5_get_poks_xor_gpu <<<grid, block>>> (threads, d_buffers[thr_id], d_permut[thr_id], d_poks, d_txs[thr_id], txs);
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free(txdata);
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} else {
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zr5_get_poks_gpu <<<grid, block>>> (threads, d_buffers[thr_id], d_permut[thr_id], d_poks);
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}
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}
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__global__ __launch_bounds__(128, 8)
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void zr5_final_round_data_gpu(uint32_t threads, uint32_t** const d_buffers, uint8_t* const d_permut, uint32_t *d_hash, uint16_t *d_poks)
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{
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// after the 4 algos rounds, copy back hash to d_hash
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const uint32_t thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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const uint8_t norder = d_permut[thread];
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const uint8_t algosrc = c_permut[norder][3];
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const uint32_t offset = thread * 16U; // 64 / 4;
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// copy only hash[4..7]
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uint2 *psrc = (uint2*) (d_buffers[algosrc] + offset);
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uint2 *phash = (uint2*) (&d_hash[offset]);
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phash[2] = psrc[2];
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phash[3] = psrc[3];
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}
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}
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__host__
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void zr5_final_round(int thr_id, uint32_t threads)
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{
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const uint32_t threadsperblock = 128;
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dim3 grid((threads + threadsperblock - 1) / threadsperblock);
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dim3 block(threadsperblock);
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zr5_final_round_data_gpu <<<grid, block>>> (threads, d_buffers[thr_id], d_permut[thr_id], d_hash[thr_id], d_poks[thr_id]);
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}
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extern void jackpot_keccak512_cpu_init(int thr_id, uint32_t threads);
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extern void jackpot_keccak512_cpu_setBlock(void *pdata, size_t inlen);
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extern void zr5_keccak512_cpu_hash(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_hash);
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extern void zr5_keccak512_cpu_hash_pok(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t* pdata, uint32_t *d_hash, uint16_t *d_poks);
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extern void quark_blake512_cpu_init(int thr_id, uint32_t threads);
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extern void quark_blake512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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extern void quark_groestl512_cpu_init(int thr_id, uint32_t threads);
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extern void quark_groestl512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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extern void quark_groestl512_cpu_free(int thr_id);
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extern void quark_jh512_cpu_init(int thr_id, uint32_t threads);
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extern void quark_jh512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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extern void quark_skein512_cpu_init(int thr_id, uint32_t threads);
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extern void quark_skein512_cpu_hash_64(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order);
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static bool init[MAX_GPUS] = { 0 };
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extern "C" int scanhash_zr5(int thr_id, struct work *work,
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uint32_t max_nonce, unsigned long *hashes_done)
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{
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uint32_t _ALIGN(64) tmpdata[20];
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uint32_t *pdata = work->data;
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uint32_t *ptarget = work->target;
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const uint32_t oldp0 = pdata[0];
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const uint32_t version = (oldp0 & (~POK_DATA_MASK)) | (use_pok ? POK_BOOL_MASK : 0);
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const uint32_t first_nonce = pdata[19];
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uint32_t throughput = cuda_default_throughput(thr_id, 1U << 18);
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throughput = min(throughput, (1U << 20)-1024);
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if (init[thr_id]) throughput = min(throughput, max_nonce - first_nonce);
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if (opt_benchmark)
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ptarget[7] = 0x0000ff;
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memcpy(tmpdata, pdata, 80);
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if (!init[thr_id])
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{
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cudaSetDevice(device_map[thr_id]);
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// constants
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cudaMemcpyToSymbol(c_permut, permut, 24*4, 0, cudaMemcpyHostToDevice);
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// hash buffer = keccak hash 64 required
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cudaMalloc(&d_hash[thr_id], 64 * throughput);
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cudaMalloc(&d_poks[thr_id], sizeof(uint16_t) * throughput);
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cudaMalloc(&d_permut[thr_id], sizeof(uint8_t) * throughput);
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cudaMalloc(&d_buffers[thr_id], 4 * sizeof(uint32_t*));
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// data buffers for the 4 rounds
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cudaMalloc(&d_blake[thr_id], 64 * throughput);
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cudaMalloc(&d_groes[thr_id], 64 * throughput);
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cudaMalloc(&d_jh512[thr_id], 64 * throughput);
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cudaMalloc(&d_skein[thr_id], 64 * throughput);
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cudaMalloc(&d_txs[thr_id], POK_MAX_TXS * POK_MAX_TX_SZ);
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jackpot_keccak512_cpu_init(thr_id, throughput);
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quark_blake512_cpu_init(thr_id, throughput);
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quark_groestl512_cpu_init(thr_id, throughput);
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quark_jh512_cpu_init(thr_id, throughput);
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quark_skein512_cpu_init(thr_id, throughput);
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cuda_check_cpu_init(thr_id, throughput);
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CUDA_SAFE_CALL(cudaDeviceSynchronize());
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init[thr_id] = true;
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}
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tmpdata[0] = version;
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jackpot_keccak512_cpu_setBlock((void*)tmpdata, 80);
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cuda_check_cpu_setTarget(ptarget);
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do {
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int order = 0;
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// Keccak512 Hash with CUDA
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zr5_keccak512_cpu_hash(thr_id, throughput, pdata[19], d_hash[thr_id]);
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zr5_init_vars(thr_id, throughput);
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for (int rnd=0; rnd<4; rnd++) {
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if (rnd > 0)
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zr5_move_data_to_hash(thr_id, throughput, rnd);
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quark_blake512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_blake[thr_id], order++);
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quark_groestl512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_groes[thr_id], order++);
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quark_jh512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_jh512[thr_id], order++);
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quark_skein512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_skein[thr_id], order++);
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}
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// store on device d_poks all hash[0] prefixes
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zr5_get_poks(thr_id, throughput, d_poks[thr_id], work);
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// Keccak512 with pok
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zr5_keccak512_cpu_hash_pok(thr_id, throughput, pdata[19], pdata, d_hash[thr_id], d_poks[thr_id]);
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zr5_init_vars(thr_id, throughput);
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for (int rnd=0; rnd<4; rnd++) {
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if (rnd > 0)
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zr5_move_data_to_hash(thr_id, throughput, rnd);
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quark_blake512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_blake[thr_id], order++);
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quark_groestl512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_groes[thr_id], order++);
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quark_jh512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_jh512[thr_id], order++);
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quark_skein512_cpu_hash_64(thr_id, throughput, pdata[19], NULL, d_skein[thr_id], order++);
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}
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zr5_final_round(thr_id, throughput);
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various fixes for SM 2.1 and the benchmark
X11+ algos and quark are not compatible for the moment
but these ones are :
Benchmark results for Gigabyte GTX 460 (SM 2.1 / 1 GB):
blakecoin : 159090.5 kH/s, 1 MB, 1048576 thr.
blake : 70208.9 kH/s, 1 MB, 1048576 thr.
bmw : 122802.6 kH/s, 65 MB, 2097152 thr.
deep : 3533.6 kH/s, 33 MB, 524288 thr.
fugue256 : 43177.9 kH/s, 17 MB, 524288 thr.
heavy : 4118.2 kH/s, 147 MB, 524032 thr.
keccak : 18673.1 kH/s, 129 MB, 2097152 thr.
luffa : 28816.0 kH/s, 257 MB, 4194304 thr.
lyra2 : 213.7 kH/s, 570 MB, 65536 thr.
mjollnir : 3895.6 kH/s, 147 MB, 524032 thr.
nist5 : 1101.4 kH/s, 67 MB, 1048576 thr.
penta : 501.6 kH/s, 21 MB, 327680 thr.
skein : 5432.4 kH/s, 65 MB, 1048576 thr.
skein2 : 6788.9 kH/s, 33 MB, 524288 thr.
whirlpool : 688.5 kH/s, 33 MB, 524288 thr.
zr5 : 122.5 kH/s, 86 MB, 262144 thr.
9 years ago
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// do not scan results on interuption
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if (work_restart[thr_id].restart)
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return -1;
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uint32_t foundNonce = cuda_check_hash(thr_id, throughput, pdata[19], d_hash[thr_id]);
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if (foundNonce != UINT32_MAX)
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{
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uint32_t vhash64[8];
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uint32_t oldp19 = pdata[19];
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uint32_t offset = foundNonce - pdata[19];
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uint32_t pok = 0;
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uint16_t h_pok;
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*hashes_done = pdata[19] - first_nonce + throughput;
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cudaMemcpy(&h_pok, d_poks[thr_id] + offset, sizeof(uint16_t), cudaMemcpyDeviceToHost);
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pok = version | (0x10000UL * h_pok);
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pdata[0] = pok; pdata[19] = foundNonce;
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zr5hash(vhash64, pdata);
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if (vhash64[7] <= ptarget[7] && fulltest(vhash64, ptarget)) {
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int res = 1;
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work_set_target_ratio(work, vhash64);
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uint32_t secNonce = cuda_check_hash_suppl(thr_id, throughput, oldp19, d_hash[thr_id], 1);
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if (secNonce != 0) {
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offset = secNonce - oldp19;
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cudaMemcpy(&h_pok, d_poks[thr_id] + offset, sizeof(uint16_t), cudaMemcpyDeviceToHost);
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pok = version | (0x10000UL * h_pok);
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memcpy(tmpdata, pdata, 80);
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tmpdata[0] = pok; tmpdata[19] = secNonce;
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zr5hash(vhash64, tmpdata);
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if (vhash64[7] <= ptarget[7] && fulltest(vhash64, ptarget)) {
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if (bn_hash_target_ratio(vhash64, ptarget) > work->shareratio)
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work_set_target_ratio(work, vhash64);
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pdata[21] = secNonce;
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pdata[22] = pok;
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res++;
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}
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}
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return res;
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} else {
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various fixes for SM 2.1 and the benchmark
X11+ algos and quark are not compatible for the moment
but these ones are :
Benchmark results for Gigabyte GTX 460 (SM 2.1 / 1 GB):
blakecoin : 159090.5 kH/s, 1 MB, 1048576 thr.
blake : 70208.9 kH/s, 1 MB, 1048576 thr.
bmw : 122802.6 kH/s, 65 MB, 2097152 thr.
deep : 3533.6 kH/s, 33 MB, 524288 thr.
fugue256 : 43177.9 kH/s, 17 MB, 524288 thr.
heavy : 4118.2 kH/s, 147 MB, 524032 thr.
keccak : 18673.1 kH/s, 129 MB, 2097152 thr.
luffa : 28816.0 kH/s, 257 MB, 4194304 thr.
lyra2 : 213.7 kH/s, 570 MB, 65536 thr.
mjollnir : 3895.6 kH/s, 147 MB, 524032 thr.
nist5 : 1101.4 kH/s, 67 MB, 1048576 thr.
penta : 501.6 kH/s, 21 MB, 327680 thr.
skein : 5432.4 kH/s, 65 MB, 1048576 thr.
skein2 : 6788.9 kH/s, 33 MB, 524288 thr.
whirlpool : 688.5 kH/s, 33 MB, 524288 thr.
zr5 : 122.5 kH/s, 86 MB, 262144 thr.
9 years ago
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gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU!", foundNonce);
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pdata[19]++;
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pdata[0] = oldp0;
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}
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} else
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pdata[19] += throughput;
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} while (pdata[19] < max_nonce && !work_restart[thr_id].restart);
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pdata[0] = oldp0;
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*hashes_done = pdata[19] - first_nonce + 1;
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return 0;
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}
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// cleanup
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extern "C" void free_zr5(int thr_id)
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{
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if (!init[thr_id])
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return;
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cudaSetDevice(device_map[thr_id]);
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cudaFree(d_hash[thr_id]);
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cudaFree(d_poks[thr_id]);
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cudaFree(d_permut[thr_id]);
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cudaFree(d_buffers[thr_id]);
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cudaFree(d_blake[thr_id]);
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cudaFree(d_groes[thr_id]);
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cudaFree(d_jh512[thr_id]);
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cudaFree(d_skein[thr_id]);
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cudaFree(d_txs[thr_id]);
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quark_groestl512_cpu_free(thr_id);
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cuda_check_cpu_free(thr_id);
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init[thr_id] = false;
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cudaDeviceSynchronize();
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various fixes for SM 2.1 and the benchmark
X11+ algos and quark are not compatible for the moment
but these ones are :
Benchmark results for Gigabyte GTX 460 (SM 2.1 / 1 GB):
blakecoin : 159090.5 kH/s, 1 MB, 1048576 thr.
blake : 70208.9 kH/s, 1 MB, 1048576 thr.
bmw : 122802.6 kH/s, 65 MB, 2097152 thr.
deep : 3533.6 kH/s, 33 MB, 524288 thr.
fugue256 : 43177.9 kH/s, 17 MB, 524288 thr.
heavy : 4118.2 kH/s, 147 MB, 524032 thr.
keccak : 18673.1 kH/s, 129 MB, 2097152 thr.
luffa : 28816.0 kH/s, 257 MB, 4194304 thr.
lyra2 : 213.7 kH/s, 570 MB, 65536 thr.
mjollnir : 3895.6 kH/s, 147 MB, 524032 thr.
nist5 : 1101.4 kH/s, 67 MB, 1048576 thr.
penta : 501.6 kH/s, 21 MB, 327680 thr.
skein : 5432.4 kH/s, 65 MB, 1048576 thr.
skein2 : 6788.9 kH/s, 33 MB, 524288 thr.
whirlpool : 688.5 kH/s, 33 MB, 524288 thr.
zr5 : 122.5 kH/s, 86 MB, 262144 thr.
9 years ago
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}
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