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455 lines
11 KiB
455 lines
11 KiB
10 years ago
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//
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// =============== BLAKE part on nVidia GPU ======================
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//
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// This is the generic "default" implementation when no architecture
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// specific implementation is available in the kernel.
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//
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// NOTE: compile this .cu module for compute_10,sm_10 with --maxrregcount=64
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//
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// TODO: CUDA porting work remains to be done.
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//
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#include <map>
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#include <stdint.h>
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#include "cuda_runtime.h"
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#include "salsa_kernel.h"
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#include "miner.h"
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typedef uint32_t sph_u32;
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#define SPH_C32(x) ((sph_u32)(x))
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#define SPH_T32(x) ((x) & SPH_C32(0xFFFFFFFF))
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#define SPH_ROTL32(x, n) SPH_T32(((x) << (n)) | ((x) >> (32 - (n))))
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#define SPH_ROTR32(x, n) SPH_ROTL32(x, (32 - (n)))
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__constant__ uint64_t ptarget64[4];
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__constant__ uint32_t pdata[20];
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// define some error checking macros
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#undef checkCudaErrors
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#if WIN32
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#define DELIMITER '/'
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#else
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#define DELIMITER '/'
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#endif
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#define __FILENAME__ ( strrchr(__FILE__, DELIMITER) != NULL ? strrchr(__FILE__, DELIMITER)+1 : __FILE__ )
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#define checkCudaErrors(x) \
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{ \
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cudaGetLastError(); \
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x; \
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cudaError_t err = cudaGetLastError(); \
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if (err != cudaSuccess) \
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applog(LOG_ERR, "GPU #%d: cudaError %d (%s) calling '%s' (%s line %d)\n", device_map[thr_id], err, cudaGetErrorString(err), #x, __FILENAME__, __LINE__); \
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}
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// from salsa_kernel.cu
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extern std::map<int, uint32_t *> context_idata[2];
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extern std::map<int, uint32_t *> context_odata[2];
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extern std::map<int, cudaStream_t> context_streams[2];
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extern std::map<int, uint32_t *> context_hash[2];
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#ifdef _MSC_VER
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#pragma warning (disable: 4146)
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#endif
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static __device__ sph_u32 cuda_sph_bswap32(sph_u32 x)
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{
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return (((x << 24) & 0xff000000u) | ((x << 8) & 0x00ff0000u)
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| ((x >> 8) & 0x0000ff00u) | ((x >> 24) & 0x000000ffu));
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}
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/**
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* Encode a 32-bit value into the provided buffer (big endian convention).
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*
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* @param dst the destination buffer
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* @param val the 32-bit value to encode
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*/
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static __device__ void
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cuda_sph_enc32be(void *dst, sph_u32 val)
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{
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*(sph_u32 *)dst = cuda_sph_bswap32(val);
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}
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#define Z00 0
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#define Z01 1
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#define Z02 2
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#define Z03 3
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#define Z04 4
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#define Z05 5
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#define Z06 6
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#define Z07 7
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#define Z08 8
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#define Z09 9
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#define Z0A A
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#define Z0B B
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#define Z0C C
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#define Z0D D
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#define Z0E E
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#define Z0F F
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#define Z10 E
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#define Z11 A
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#define Z12 4
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#define Z13 8
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#define Z14 9
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#define Z15 F
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#define Z16 D
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#define Z17 6
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#define Z18 1
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#define Z19 C
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#define Z1A 0
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#define Z1B 2
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#define Z1C B
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#define Z1D 7
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#define Z1E 5
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#define Z1F 3
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#define Z20 B
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#define Z21 8
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#define Z22 C
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#define Z23 0
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#define Z24 5
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#define Z25 2
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#define Z26 F
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#define Z27 D
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#define Z28 A
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#define Z29 E
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#define Z2A 3
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#define Z2B 6
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#define Z2C 7
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#define Z2D 1
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#define Z2E 9
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#define Z2F 4
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#define Z30 7
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#define Z31 9
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#define Z32 3
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#define Z33 1
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#define Z34 D
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#define Z35 C
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#define Z36 B
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#define Z37 E
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#define Z38 2
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#define Z39 6
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#define Z3A 5
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#define Z3B A
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#define Z3C 4
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#define Z3D 0
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#define Z3E F
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#define Z3F 8
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#define Z40 9
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#define Z41 0
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#define Z42 5
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#define Z43 7
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#define Z44 2
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#define Z45 4
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#define Z46 A
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#define Z47 F
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#define Z48 E
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#define Z49 1
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#define Z4A B
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#define Z4B C
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#define Z4C 6
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#define Z4D 8
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#define Z4E 3
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#define Z4F D
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#define Z50 2
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#define Z51 C
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#define Z52 6
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#define Z53 A
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#define Z54 0
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#define Z55 B
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#define Z56 8
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#define Z57 3
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#define Z58 4
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#define Z59 D
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#define Z5A 7
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#define Z5B 5
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#define Z5C F
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#define Z5D E
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#define Z5E 1
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#define Z5F 9
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#define Z60 C
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#define Z61 5
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#define Z62 1
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#define Z63 F
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#define Z64 E
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#define Z65 D
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#define Z66 4
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#define Z67 A
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#define Z68 0
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#define Z69 7
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#define Z6A 6
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#define Z6B 3
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#define Z6C 9
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#define Z6D 2
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#define Z6E 8
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#define Z6F B
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#define Z70 D
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#define Z71 B
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#define Z72 7
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#define Z73 E
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#define Z74 C
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#define Z75 1
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#define Z76 3
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#define Z77 9
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#define Z78 5
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#define Z79 0
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#define Z7A F
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#define Z7B 4
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#define Z7C 8
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#define Z7D 6
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#define Z7E 2
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#define Z7F A
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#define Z80 6
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#define Z81 F
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#define Z82 E
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#define Z83 9
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#define Z84 B
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#define Z85 3
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#define Z86 0
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#define Z87 8
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#define Z88 C
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#define Z89 2
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#define Z8A D
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#define Z8B 7
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#define Z8C 1
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#define Z8D 4
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#define Z8E A
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#define Z8F 5
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#define Z90 A
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#define Z91 2
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#define Z92 8
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#define Z93 4
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#define Z94 7
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#define Z95 6
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#define Z96 1
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#define Z97 5
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#define Z98 F
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#define Z99 B
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#define Z9A 9
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#define Z9B E
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#define Z9C 3
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#define Z9D C
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#define Z9E D
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#define Z9F 0
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#define Mx(r, i) Mx_(Z ## r ## i)
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#define Mx_(n) Mx__(n)
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#define Mx__(n) M ## n
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#define CSx(r, i) CSx_(Z ## r ## i)
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#define CSx_(n) CSx__(n)
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#define CSx__(n) CS ## n
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#define CS0 SPH_C32(0x243F6A88)
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#define CS1 SPH_C32(0x85A308D3)
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#define CS2 SPH_C32(0x13198A2E)
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#define CS3 SPH_C32(0x03707344)
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#define CS4 SPH_C32(0xA4093822)
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#define CS5 SPH_C32(0x299F31D0)
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#define CS6 SPH_C32(0x082EFA98)
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#define CS7 SPH_C32(0xEC4E6C89)
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#define CS8 SPH_C32(0x452821E6)
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#define CS9 SPH_C32(0x38D01377)
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#define CSA SPH_C32(0xBE5466CF)
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#define CSB SPH_C32(0x34E90C6C)
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#define CSC SPH_C32(0xC0AC29B7)
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#define CSD SPH_C32(0xC97C50DD)
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#define CSE SPH_C32(0x3F84D5B5)
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#define CSF SPH_C32(0xB5470917)
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#define GS(m0, m1, c0, c1, a, b, c, d) do { \
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a = SPH_T32(a + b + (m0 ^ c1)); \
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d = SPH_ROTR32(d ^ a, 16); \
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c = SPH_T32(c + d); \
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b = SPH_ROTR32(b ^ c, 12); \
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a = SPH_T32(a + b + (m1 ^ c0)); \
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d = SPH_ROTR32(d ^ a, 8); \
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c = SPH_T32(c + d); \
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b = SPH_ROTR32(b ^ c, 7); \
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} while (0)
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#define ROUND_S(r) do { \
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GS(Mx(r, 0), Mx(r, 1), CSx(r, 0), CSx(r, 1), V0, V4, V8, VC); \
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GS(Mx(r, 2), Mx(r, 3), CSx(r, 2), CSx(r, 3), V1, V5, V9, VD); \
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GS(Mx(r, 4), Mx(r, 5), CSx(r, 4), CSx(r, 5), V2, V6, VA, VE); \
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GS(Mx(r, 6), Mx(r, 7), CSx(r, 6), CSx(r, 7), V3, V7, VB, VF); \
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GS(Mx(r, 8), Mx(r, 9), CSx(r, 8), CSx(r, 9), V0, V5, VA, VF); \
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GS(Mx(r, A), Mx(r, B), CSx(r, A), CSx(r, B), V1, V6, VB, VC); \
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GS(Mx(r, C), Mx(r, D), CSx(r, C), CSx(r, D), V2, V7, V8, VD); \
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GS(Mx(r, E), Mx(r, F), CSx(r, E), CSx(r, F), V3, V4, V9, VE); \
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} while (0)
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#define COMPRESS32 do { \
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sph_u32 M0, M1, M2, M3, M4, M5, M6, M7; \
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sph_u32 M8, M9, MA, MB, MC, MD, ME, MF; \
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sph_u32 V0, V1, V2, V3, V4, V5, V6, V7; \
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sph_u32 V8, V9, VA, VB, VC, VD, VE, VF; \
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V0 = H0; \
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V1 = H1; \
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V2 = H2; \
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V3 = H3; \
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V4 = H4; \
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V5 = H5; \
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V6 = H6; \
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V7 = H7; \
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V8 = S0 ^ CS0; \
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V9 = S1 ^ CS1; \
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VA = S2 ^ CS2; \
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VB = S3 ^ CS3; \
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VC = T0 ^ CS4; \
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VD = T0 ^ CS5; \
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VE = T1 ^ CS6; \
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VF = T1 ^ CS7; \
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M0 = input[0]; \
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M1 = input[1]; \
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M2 = input[2]; \
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M3 = input[3]; \
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M4 = input[4]; \
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M5 = input[5]; \
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M6 = input[6]; \
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M7 = input[7]; \
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M8 = input[8]; \
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M9 = input[9]; \
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MA = input[10]; \
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MB = input[11]; \
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MC = input[12]; \
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MD = input[13]; \
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ME = input[14]; \
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MF = input[15]; \
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ROUND_S(0); \
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ROUND_S(1); \
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ROUND_S(2); \
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ROUND_S(3); \
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ROUND_S(4); \
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ROUND_S(5); \
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ROUND_S(6); \
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ROUND_S(7); \
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H0 ^= S0 ^ V0 ^ V8; \
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H1 ^= S1 ^ V1 ^ V9; \
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H2 ^= S2 ^ V2 ^ VA; \
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H3 ^= S3 ^ V3 ^ VB; \
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H4 ^= S0 ^ V4 ^ VC; \
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H5 ^= S1 ^ V5 ^ VD; \
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H6 ^= S2 ^ V6 ^ VE; \
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H7 ^= S3 ^ V7 ^ VF; \
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} while (0)
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__global__ void cuda_blake256_hash( uint64_t *g_out, uint32_t nonce, uint32_t *g_good, bool validate )
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{
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uint32_t input[16];
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uint64_t output[4];
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#pragma unroll 16
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for (int i=0; i < 16; ++i) input[i] = pdata[i];
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sph_u32 H0 = 0x6A09E667;
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sph_u32 H1 = 0xBB67AE85;
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sph_u32 H2 = 0x3C6EF372;
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sph_u32 H3 = 0xA54FF53A;
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sph_u32 H4 = 0x510E527F;
|
||
|
|
sph_u32 H5 = 0x9B05688C;
|
||
|
|
sph_u32 H6 = 0x1F83D9AB;
|
||
|
|
sph_u32 H7 = 0x5BE0CD19;
|
||
|
|
sph_u32 S0 = 0;
|
||
|
|
sph_u32 S1 = 0;
|
||
|
|
sph_u32 S2 = 0;
|
||
|
|
sph_u32 S3 = 0;
|
||
|
|
sph_u32 T0 = 0;
|
||
|
|
sph_u32 T1 = 0;
|
||
|
|
T0 = SPH_T32(T0 + 512);
|
||
|
|
COMPRESS32;
|
||
|
|
|
||
|
|
#pragma unroll 3
|
||
|
|
for (int i=0; i < 3; ++i) input[i] = pdata[16+i];
|
||
|
|
input[3] = nonce + ((blockIdx.x * blockDim.x) + threadIdx.x);
|
||
|
|
input[4] = 0x80000000;
|
||
|
|
#pragma unroll 8
|
||
|
|
for (int i=5; i < 13; ++i) input[i] = 0;
|
||
|
|
input[13] = 0x00000001;
|
||
|
|
input[14] = T1;
|
||
|
|
input[15] = T0 + 128;
|
||
|
|
|
||
|
|
T0 = SPH_T32(T0 + 128);
|
||
|
|
COMPRESS32;
|
||
|
|
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*6, H6);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*7, H7);
|
||
|
|
if (validate || output[3] <= ptarget64[3])
|
||
|
|
{
|
||
|
|
// this data is only needed when we actually need to save the hashes
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*0, H0);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*1, H1);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*2, H2);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*3, H3);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*4, H4);
|
||
|
|
cuda_sph_enc32be((unsigned char*)output + 4*5, H5);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (validate)
|
||
|
|
{
|
||
|
|
g_out += 4 * ((blockIdx.x * blockDim.x) + threadIdx.x);
|
||
|
|
#pragma unroll 4
|
||
|
|
for (int i=0; i < 4; ++i) g_out[i] = output[i];
|
||
|
|
}
|
||
|
|
|
||
|
|
if (output[3] <= ptarget64[3]) {
|
||
|
|
uint64_t *g_good64 = (uint64_t*)g_good;
|
||
|
|
if (output[3] < g_good64[3]) {
|
||
|
|
g_good64[3] = output[3];
|
||
|
|
g_good64[2] = output[2];
|
||
|
|
g_good64[1] = output[1];
|
||
|
|
g_good64[0] = output[0];
|
||
|
|
g_good[8] = nonce + ((blockIdx.x * blockDim.x) + threadIdx.x);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static bool init[MAX_GPUS] = { 0 };
|
||
|
|
static std::map<int, uint32_t *> context_good[2];
|
||
|
|
|
||
|
|
bool default_prepare_blake256(int thr_id, const uint32_t host_pdata[20], const uint32_t host_ptarget[8])
|
||
|
|
{
|
||
|
|
if (!init[thr_id])
|
||
|
|
{
|
||
|
|
// allocate pinned host memory for good hashes
|
||
|
|
uint32_t *tmp;
|
||
|
|
checkCudaErrors(cudaMalloc((void **) &tmp, 9*sizeof(uint32_t))); context_good[0][thr_id] = tmp;
|
||
|
|
checkCudaErrors(cudaMalloc((void **) &tmp, 9*sizeof(uint32_t))); context_good[1][thr_id] = tmp;
|
||
|
|
|
||
|
|
init[thr_id] = true;
|
||
|
|
}
|
||
|
|
checkCudaErrors(cudaMemcpyToSymbol(pdata, host_pdata, 80, 0, cudaMemcpyHostToDevice));
|
||
|
|
checkCudaErrors(cudaMemcpyToSymbol(ptarget64, host_ptarget, 32, 0, cudaMemcpyHostToDevice));
|
||
|
|
|
||
|
|
return context_good[0][thr_id] && context_good[1][thr_id];
|
||
|
|
}
|
||
|
|
|
||
|
|
void default_do_blake256(dim3 grid, dim3 threads, int thr_id, int stream, uint32_t *hash, uint32_t nonce, int throughput, bool do_d2h)
|
||
|
|
{
|
||
|
|
checkCudaErrors(cudaMemsetAsync(context_good[stream][thr_id], 0xff, 9 * sizeof(uint32_t), context_streams[stream][thr_id]));
|
||
|
|
|
||
|
|
cuda_blake256_hash<<<grid, threads, 0, context_streams[stream][thr_id]>>>((uint64_t*)context_hash[stream][thr_id], nonce, context_good[stream][thr_id], do_d2h);
|
||
|
|
|
||
|
|
// copy hashes from device memory to host (ALL hashes, lots of data...)
|
||
|
|
if (do_d2h && hash != NULL) {
|
||
|
|
size_t mem_size = throughput * sizeof(uint32_t) * 8;
|
||
|
|
checkCudaErrors(cudaMemcpyAsync(hash, context_hash[stream][thr_id], mem_size,
|
||
|
|
cudaMemcpyDeviceToHost, context_streams[stream][thr_id]));
|
||
|
|
}
|
||
|
|
else if (hash != NULL) {
|
||
|
|
// asynchronous copy of winning nonce (just 4 bytes...)
|
||
|
|
checkCudaErrors(cudaMemcpyAsync(hash, context_good[stream][thr_id]+8, sizeof(uint32_t),
|
||
|
|
cudaMemcpyDeviceToHost, context_streams[stream][thr_id]));
|
||
|
|
}
|
||
|
|
}
|