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459 lines
12 KiB
459 lines
12 KiB
#ifndef CUDA_HELPER_H |
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#define CUDA_HELPER_H |
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#include <cuda.h> |
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#include <cuda_runtime.h> |
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#if defined(_MSC_VER) |
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/* reduce warnings */ |
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#include <device_functions.h> |
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#include <device_launch_parameters.h> |
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#endif |
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#include <stdint.h> |
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extern __device__ __device_builtin__ void __syncthreads(void); |
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#ifndef __CUDA_ARCH__ |
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// define blockDim and threadIdx for host |
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extern const dim3 blockDim; |
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extern const uint3 threadIdx; |
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#endif |
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#ifndef SPH_C32 |
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#define SPH_C32(x) ((uint32_t)(x ## U)) |
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#endif |
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#ifndef SPH_C64 |
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#define SPH_C64(x) ((uint64_t)(x ## ULL)) |
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#endif |
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#define SPH_T32(x) ((x) & SPH_C32(0xFFFFFFFF)) |
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#if __CUDA_ARCH__ < 350 |
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// Kepler (Compute 3.0) |
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#define ROTL32(x, n) SPH_T32(((x) << (n)) | ((x) >> (32 - (n)))) |
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#else |
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// Kepler (Compute 3.5, 5.0) |
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#define ROTL32(x, n) __funnelshift_l( (x), (x), (n) ) |
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#endif |
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__device__ __forceinline__ uint64_t MAKE_ULONGLONG(uint32_t LO, uint32_t HI) |
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{ |
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#if __CUDA_ARCH__ >= 130 |
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return __double_as_longlong(__hiloint2double(HI, LO)); |
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#else |
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return (uint64_t)LO | (((uint64_t)HI) << 32); |
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#endif |
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} |
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// das Hi Word in einem 64 Bit Typen ersetzen |
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__device__ __forceinline__ uint64_t REPLACE_HIWORD(const uint64_t &x, const uint32_t &y) { |
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return (x & 0xFFFFFFFFULL) | (((uint64_t)y) << 32ULL); |
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} |
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// das Lo Word in einem 64 Bit Typen ersetzen |
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__device__ __forceinline__ uint64_t REPLACE_LOWORD(const uint64_t &x, const uint32_t &y) { |
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return (x & 0xFFFFFFFF00000000ULL) | ((uint64_t)y); |
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} |
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// Endian Drehung für 32 Bit Typen |
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#ifdef __CUDA_ARCH__ |
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__device__ __forceinline__ uint32_t cuda_swab32(uint32_t x) |
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{ |
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/* device */ |
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return __byte_perm(x, x, 0x0123); |
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} |
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#else |
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/* host */ |
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#define cuda_swab32(x) \ |
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((((x) << 24) & 0xff000000u) | (((x) << 8) & 0x00ff0000u) | \ |
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(((x) >> 8) & 0x0000ff00u) | (((x) >> 24) & 0x000000ffu)) |
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#endif |
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// das Lo Word aus einem 64 Bit Typen extrahieren |
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__device__ __forceinline__ uint32_t _LOWORD(const uint64_t &x) { |
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#if __CUDA_ARCH__ >= 130 |
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return (uint32_t)__double2loint(__longlong_as_double(x)); |
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#else |
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return (uint32_t)(x & 0xFFFFFFFFULL); |
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#endif |
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} |
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// das Hi Word aus einem 64 Bit Typen extrahieren |
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__device__ __forceinline__ uint32_t _HIWORD(const uint64_t &x) { |
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#if __CUDA_ARCH__ >= 130 |
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return (uint32_t)__double2hiint(__longlong_as_double(x)); |
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#else |
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return (uint32_t)(x >> 32); |
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#endif |
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} |
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#ifdef __CUDA_ARCH__ |
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__device__ __forceinline__ uint64_t cuda_swab64(uint64_t x) |
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{ |
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// Input: 77665544 33221100 |
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// Output: 00112233 44556677 |
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uint64_t result = __byte_perm((uint32_t) x, 0, 0x0123); |
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return (result << 32) | __byte_perm(_HIWORD(x), 0, 0x0123); |
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} |
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#else |
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/* host */ |
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#define cuda_swab64(x) \ |
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((uint64_t)((((uint64_t)(x) & 0xff00000000000000ULL) >> 56) | \ |
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(((uint64_t)(x) & 0x00ff000000000000ULL) >> 40) | \ |
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(((uint64_t)(x) & 0x0000ff0000000000ULL) >> 24) | \ |
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(((uint64_t)(x) & 0x000000ff00000000ULL) >> 8) | \ |
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(((uint64_t)(x) & 0x00000000ff000000ULL) << 8) | \ |
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(((uint64_t)(x) & 0x0000000000ff0000ULL) << 24) | \ |
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(((uint64_t)(x) & 0x000000000000ff00ULL) << 40) | \ |
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(((uint64_t)(x) & 0x00000000000000ffULL) << 56))) |
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#endif |
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#define cuda_swab32ll(u64) \ |
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MAKE_ULONGLONG(cuda_swab32(_LOWORD(u64)), cuda_swab32(_HIWORD(u64))) |
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/*********************************************************************/ |
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// Macro to catch CUDA errors in CUDA runtime calls |
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#define CUDA_SAFE_CALL(call) \ |
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do { \ |
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cudaError_t err = call; \ |
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if (cudaSuccess != err) { \ |
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fprintf (stderr, "Cuda error in file '%s' in line %i : %s.\n",\ |
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__FILE__, __LINE__, cudaGetErrorString(err) ); \ |
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exit(EXIT_FAILURE); \ |
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} \ |
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} while (0) |
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/*********************************************************************/ |
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#ifdef _WIN64 |
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#define USE_XOR_ASM_OPTS 0 |
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#else |
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#define USE_XOR_ASM_OPTS 1 |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm for whirpool |
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__device__ __forceinline__ |
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uint64_t xor1(uint64_t a, uint64_t b) { |
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uint64_t result; |
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asm("xor.b64 %0, %1, %2;" : "=l"(result) : "l"(a), "l"(b)); |
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return result; |
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} |
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#else |
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#define xor1(a,b) (a ^ b) |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm for whirpool |
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__device__ __forceinline__ |
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uint64_t xor3(uint64_t a, uint64_t b, uint64_t c) { |
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uint64_t result; |
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asm("xor.b64 %0, %2, %3;\n\t" |
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"xor.b64 %0, %0, %1;\n\t" |
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/* output : input registers */ |
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: "=l"(result) : "l"(a), "l"(b), "l"(c)); |
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return result; |
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} |
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#else |
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#define xor3(a,b,c) (a ^ b ^ c) |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm 32 for m7_sha256 |
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__device__ __forceinline__ |
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uint32_t xor3b(uint32_t a, uint32_t b, uint32_t c) { |
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uint32_t result; |
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asm("xor.b32 %0, %2, %3;\n\t" |
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"xor.b32 %0, %0, %1;\n\t" |
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: "=r"(result) : "r"(a) ,"r"(b),"r"(c)); |
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return result; |
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} |
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#else |
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#define xor3b(a,b,c) (a ^ b ^ c) |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm for m7_sha256 |
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__device__ __forceinline__ |
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uint64_t xor5(uint64_t a, uint64_t b, uint64_t c, uint64_t d, uint64_t e) { |
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uint64_t result; |
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asm("{\n\t" |
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" .reg .u64 t1,t2,t3;\n\t" |
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"xor.b64 t1, %1, %2;\n\t" |
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"xor.b64 t2, %3, %4;\n\t" |
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"xor.b64 t3, t1, t2;\n\t" |
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"xor.b64 %0, t3,%5;\n\t" |
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"}" |
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: "=l"(result) : "l"(a) ,"l"(b), "l"(c), "l"(d) ,"l"(e)); |
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return result; |
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} |
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#else |
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#define xor5(a,b,c,d,e) (a ^ b ^ c ^ d ^ e) |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm for m7_ripemd160 |
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__device__ __forceinline__ |
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uint64_t xornot64(uint64_t a, uint64_t b, uint64_t c) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .u64 m,n;\n\t" |
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"not.b64 m,%2; \n\t" |
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"or.b64 n, %1,m;\n\t" |
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"xor.b64 %0, n,%3;\n\t" |
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"}" |
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: "=l"(result) : "l"(a), "l"(b), "l"(c)); |
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return result; |
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} |
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#else |
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#define xornot64(a,b,c) (c ^ (a | ~b)) |
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#endif |
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#if USE_XOR_ASM_OPTS |
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// device asm for m7_sha256 |
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__device__ __forceinline__ |
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uint64_t xornt64(uint64_t a, uint64_t b, uint64_t c) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .u64 m,n;\n\t" |
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"not.b64 m,%3; \n\t" |
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"or.b64 n, %2,m;\n\t" |
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"xor.b64 %0, %1,n;\n\t" |
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"}" |
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: "=l"(result) : "l"(a), "l"(b), "l"(c)); |
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return result; |
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} |
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#else |
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#define xornt64(a,b,c) (a ^ (b | ~c)) |
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#endif |
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// device asm for m7_haval |
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__device__ __forceinline__ |
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uint32_t sph_t32(uint32_t x) |
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{ |
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uint32_t result; |
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asm("and.b32 %0,%1,0xFFFFFFFF;" : "=r"(result) : "r"(x)); |
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return result; |
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} |
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#if USE_XOR_ASM_OPTS |
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// device asm for whirlpool |
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__device__ __forceinline__ |
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uint64_t xor8(uint64_t a, uint64_t b, uint64_t c, uint64_t d,uint64_t e,uint64_t f,uint64_t g, uint64_t h) |
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{ |
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uint64_t result; |
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asm("xor.b64 %0, %1, %2;" : "=l"(result) : "l"(g) ,"l"(h)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(f)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(e)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(d)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(c)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(b)); |
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asm("xor.b64 %0, %0, %1;" : "+l"(result) : "l"(a)); |
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return result; |
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} |
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#else |
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#define xor8(a,b,c,d,e,f,g,h) (a^b^c^d^e^f^g^h) |
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#endif |
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// device asm for x17 |
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__device__ __forceinline__ |
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uint64_t xandx(uint64_t a, uint64_t b, uint64_t c) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .u64 n;\n\t" |
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"xor.b64 %0, %2, %3;\n\t" |
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"and.b64 n, %0, %1;\n\t" |
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"xor.b64 %0, n, %3;" |
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"}\n" |
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: "=l"(result) : "l"(a), "l"(b), "l"(c)); |
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return result; |
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} |
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// device asm for x17 |
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__device__ __forceinline__ |
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uint64_t sph_t64(uint64_t x) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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"and.b64 %0,%1,0xFFFFFFFFFFFFFFFF;\n\t" |
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"}\n" |
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: "=l"(result) : "l"(x)); |
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return result; |
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} |
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// device asm for x17 |
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__device__ __forceinline__ |
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uint64_t andor(uint64_t a, uint64_t b, uint64_t c) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .u64 m,n;\n\t" |
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"and.b64 m, %1, %2;\n\t" |
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" or.b64 n, %1, %2;\n\t" |
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"and.b64 %0, n, %3;\n\t" |
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" or.b64 %0, %0, m ;\n\t" |
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"}\n" |
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: "=l"(result) : "l"(a), "l"(b), "l"(c)); |
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return result; |
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} |
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// device asm for x17 |
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__device__ __forceinline__ |
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uint64_t shr_t64(uint64_t x, uint32_t n) |
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{ |
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uint64_t result; |
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asm("shr.b64 %0,%1,%2;\n\t" |
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"and.b64 %0,%0,0xFFFFFFFFFFFFFFFF;\n\t" /* useful ? */ |
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: "=l"(result) : "l"(x), "r"(n)); |
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return result; |
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} |
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// device asm for ? |
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__device__ __forceinline__ |
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uint64_t shl_t64(uint64_t x, uint32_t n) |
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{ |
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uint64_t result; |
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asm("shl.b64 %0,%1,%2;\n\t" |
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"and.b64 %0,%0,0xFFFFFFFFFFFFFFFF;\n\t" /* useful ? */ |
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: "=l"(result) : "l"(x), "r"(n)); |
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return result; |
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} |
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// device asm for m7_sha256 |
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__device__ __forceinline__ |
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uint32_t andor32(uint32_t a, uint32_t b, uint32_t c) |
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{ |
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uint32_t result; |
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asm("{\n\t" |
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".reg .u32 m,n;\n\t" |
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"and.b32 m, %1, %2;\n\t" |
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" or.b32 n, %1, %2;\n\t" |
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"and.b32 %0, n, %3;\n\t" |
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" or.b32 %0, %0, m ;\n\t" |
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"}\n" |
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: "=r"(result) : "r"(a), "r"(b), "r"(c)); |
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return result; |
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} |
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// device asm for m7_sha256 |
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__device__ __forceinline__ |
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uint32_t shr_t32(uint32_t x,uint32_t n) |
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{ |
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uint32_t result; |
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asm("shr.b32 %0,%1,%2;\n" : "=r"(result) : "r"(x), "r"(n)); |
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return result; |
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} |
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// device asm for ? |
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__device__ __forceinline__ |
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uint32_t shl_t32(uint32_t x,uint32_t n) |
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{ |
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uint32_t result; |
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asm("shl.b32 %0,%1,%2;\n" : "=r"(result) : "r"(x), "r"(n)); |
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return result; |
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} |
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// 64-bit ROTATE RIGHT |
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#if __CUDA_ARCH__ >= 350 |
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/* complicated sm >= 3.5 one (with Funnel Shifter beschleunigt), to bench */ |
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__device__ __forceinline__ |
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uint64_t ROTR64(const uint64_t value, const int offset) { |
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uint2 result; |
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if(offset < 32) { |
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asm("shf.r.wrap.b32 %0, %1, %2, %3;" : "=r"(result.x) : "r"(__double2loint(__longlong_as_double(value))), "r"(__double2hiint(__longlong_as_double(value))), "r"(offset)); |
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asm("shf.r.wrap.b32 %0, %1, %2, %3;" : "=r"(result.y) : "r"(__double2hiint(__longlong_as_double(value))), "r"(__double2loint(__longlong_as_double(value))), "r"(offset)); |
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} else { |
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asm("shf.r.wrap.b32 %0, %1, %2, %3;" : "=r"(result.x) : "r"(__double2hiint(__longlong_as_double(value))), "r"(__double2loint(__longlong_as_double(value))), "r"(offset)); |
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asm("shf.r.wrap.b32 %0, %1, %2, %3;" : "=r"(result.y) : "r"(__double2loint(__longlong_as_double(value))), "r"(__double2hiint(__longlong_as_double(value))), "r"(offset)); |
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} |
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return __double_as_longlong(__hiloint2double(result.y, result.x)); |
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} |
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#elif __CUDA_ARCH__ >= 120 |
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__device__ __forceinline__ |
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uint64_t ROTR64(const uint64_t x, const int offset) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .b64 lhs;\n\t" |
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".reg .u32 roff;\n\t" |
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"shr.b64 lhs, %1, %2;\n\t" |
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"sub.u32 roff, 64, %2;\n\t" |
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"shl.b64 %0, %1, roff;\n\t" |
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"add.u64 %0, %0, lhs;\n\t" |
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"}\n" |
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: "=l"(result) : "l"(x), "r"(offset)); |
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return result; |
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} |
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#else |
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/* host */ |
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#define ROTR64(x, n) (((x) >> (n)) | ((x) << (64 - (n)))) |
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#endif |
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// 64-bit ROTATE LEFT |
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#if __CUDA_ARCH__ >= 350 |
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__device__ __forceinline__ |
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uint64_t ROTL64(const uint64_t value, const int offset) { |
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uint2 result; |
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if(offset >= 32) { |
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asm("shf.l.wrap.b32 %0, %1, %2, %3;" : "=r"(result.x) : "r"(__double2loint(__longlong_as_double(value))), "r"(__double2hiint(__longlong_as_double(value))), "r"(offset)); |
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asm("shf.l.wrap.b32 %0, %1, %2, %3;" : "=r"(result.y) : "r"(__double2hiint(__longlong_as_double(value))), "r"(__double2loint(__longlong_as_double(value))), "r"(offset)); |
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} else { |
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asm("shf.l.wrap.b32 %0, %1, %2, %3;" : "=r"(result.x) : "r"(__double2hiint(__longlong_as_double(value))), "r"(__double2loint(__longlong_as_double(value))), "r"(offset)); |
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asm("shf.l.wrap.b32 %0, %1, %2, %3;" : "=r"(result.y) : "r"(__double2loint(__longlong_as_double(value))), "r"(__double2hiint(__longlong_as_double(value))), "r"(offset)); |
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} |
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return __double_as_longlong(__hiloint2double(result.y, result.x)); |
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} |
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#elif __CUDA_ARCH__ >= 120 |
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__device__ __forceinline__ |
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uint64_t ROTL64(const uint64_t x, const int offset) |
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{ |
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uint64_t result; |
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asm("{\n\t" |
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".reg .b64 lhs;\n\t" |
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".reg .u32 roff;\n\t" |
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"shl.b64 lhs, %1, %2;\n\t" |
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"sub.u32 roff, 64, %2;\n\t" |
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"shr.b64 %0, %1, roff;\n\t" |
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"add.u64 %0, lhs, %0;\n\t" |
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"}\n" |
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: "=l"(result) : "l"(x), "r"(offset)); |
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return result; |
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} |
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#else |
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/* host */ |
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#define ROTL64(x, n) (((x) << (n)) | ((x) >> (64 - (n)))) |
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#endif |
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__device__ __forceinline__ |
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void muladd128(uint64_t &u,uint64_t &v,uint64_t a, uint64_t b,uint64_t &c,uint64_t &e) |
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{ |
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asm("{\n\t" |
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".reg .b64 abl,abh; \n\t" |
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".reg .b32 abll,ablh,abhl,abhh,x1,x2,x3,x4; \n\t" |
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".reg .b32 cl,ch,el,eh; \n\t" |
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|
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"mul.lo.u64 abl,%2,%3; \n\t" |
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"mul.hi.u64 abh,%2,%3; \n\t" |
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"mov.b64 {abll,ablh},abl; \n\t" |
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"mov.b64 {abhl,abhh},abh; \n\t" |
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"mov.b64 {cl,ch},%4; \n\t" |
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"mov.b64 {el,eh},%5; \n\t" |
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"add.cc.u32 x1,cl,el; \n\t" |
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"addc.cc.u32 x2,ch,eh; \n\t" |
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"addc.u32 x3,0,0; \n\t" |
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"add.cc.u32 x1,x1,abll; \n\t" |
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"addc.cc.u32 x2,x2,ablh; \n\t" |
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"addc.cc.u32 x3,x3,abhl; \n\t" |
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"addc.u32 x4,abhh,0; \n\t" |
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"mov.b64 %1,{x1,x2}; \n\t" |
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"mov.b64 %0,{x3,x4}; \n\t" |
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"}" |
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|
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: "=l"(u), "=l"(v) : "l"(a) , "l"(b) , "l"(c) , "l"(e)); |
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} |
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#endif // #ifndef CUDA_HELPER_H
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