committing a faster table based version of the GroestlCoin algo for those who can compile the source code
This commit is contained in:
Christian Buchner
parent
2ca6ede92b
commit
bdef3bb22e
@ -7,6 +7,7 @@
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#include <stdio.h>
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#include <memory.h>
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// IMPORTANT: leave this enabled!
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#define USE_SHARED 1
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// aus cpu-miner.c
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@ -15,17 +16,24 @@ extern int device_map[8];
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// aus heavy.cu
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extern cudaError_t MyStreamSynchronize(cudaStream_t stream, int situation, int thr_id);
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// aus driver.c
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extern "C" void set_device(int device);
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// Folgende Definitionen später durch header ersetzen
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typedef unsigned char uint8_t;
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typedef unsigned int uint32_t;
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typedef unsigned long long uint64_t;
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// diese Struktur wird in der Init Funktion angefordert
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static cudaDeviceProp props;
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// globaler Speicher für alle HeftyHashes aller Threads
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__constant__ uint32_t pTarget[8]; // Single GPU
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extern uint32_t *d_resultNonce[8];
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__constant__ uint32_t groestlcoin_gpu_msg[32];
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#define SPH_C32(x) ((uint32_t)(x ## U))
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#define SPH_T32(x) ((x) & SPH_C32(0xFFFFFFFF))
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#define PC32up(j, r) ((uint32_t)((j) + (r)))
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@ -33,17 +41,16 @@ __constant__ uint32_t groestlcoin_gpu_msg[32];
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#define QC32up(j, r) 0xFFFFFFFF
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#define QC32dn(j, r) (((uint32_t)(r) << 24) ^ SPH_T32(~((uint32_t)(j) << 24)))
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#define B32_0(x) ((x) & 0xFF)
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#define B32_1(x) (((x) >> 8) & 0xFF)
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#define B32_2(x) (((x) >> 16) & 0xFF)
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#define B32_3(x) ((x) >> 24)
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#define SPH_C32(x) ((uint32_t)(x ## U))
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#define C32e(x) ((SPH_C32(x) >> 24) \
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| ((SPH_C32(x) >> 8) & SPH_C32(0x0000FF00)) \
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| ((SPH_C32(x) << 8) & SPH_C32(0x00FF0000)) \
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| ((SPH_C32(x) << 24) & SPH_C32(0xFF000000)))
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#define B32_0(x) __byte_perm(x, 0, 0x4440)
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//((x) & 0xFF)
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#define B32_1(x) __byte_perm(x, 0, 0x4441)
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//(((x) >> 8) & 0xFF)
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#define B32_2(x) __byte_perm(x, 0, 0x4442)
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//(((x) >> 16) & 0xFF)
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#define B32_3(x) __byte_perm(x, 0, 0x4443)
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//((x) >> 24)
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#if 0
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#if USE_SHARED
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#define T0up(x) (*((uint32_t*)mixtabs + ( (x))))
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#define T0dn(x) (*((uint32_t*)mixtabs + (256+(x))))
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@ -63,6 +70,18 @@ __constant__ uint32_t groestlcoin_gpu_msg[32];
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#define T3up(x) tex1Dfetch(t3up1, x)
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#define T3dn(x) tex1Dfetch(t3dn1, x)
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#endif
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#endif
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// a healthy mix between shared and textured access provides the highest speed!
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#define T0up(x) (*((uint32_t*)mixtabs + ( (x))))
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#define T0dn(x) tex1Dfetch(t0dn1, x)
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#define T1up(x) tex1Dfetch(t1up1, x)
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#define T1dn(x) (*((uint32_t*)mixtabs + (768+(x))))
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#define T2up(x) tex1Dfetch(t2up1, x)
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#define T2dn(x) (*((uint32_t*)mixtabs + (1280+(x))))
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#define T3up(x) (*((uint32_t*)mixtabs + (1536+(x))))
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#define T3dn(x) tex1Dfetch(t3dn1, x)
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texture<unsigned int, 1, cudaReadModeElementType> t0up1;
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texture<unsigned int, 1, cudaReadModeElementType> t0dn1;
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texture<unsigned int, 1, cudaReadModeElementType> t1up1;
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@ -81,21 +100,6 @@ extern uint32_t T2dn_cpu[];
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extern uint32_t T3up_cpu[];
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extern uint32_t T3dn_cpu[];
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#if __CUDA_ARCH__ < 350
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// Kepler (Compute 3.0)
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#define S(x, n) (((x) >> (n)) | ((x) << (32 - (n))))
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#else
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// Kepler (Compute 3.5)
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#define S(x, n) __funnelshift_r( x, x, n );
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#endif
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#define R(x, n) ((x) >> (n))
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#define Ch(x, y, z) ((x & (y ^ z)) ^ z)
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#define Maj(x, y, z) ((x & (y | z)) | (y & z))
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#define S0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22))
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#define S1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25))
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#define s0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3))
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#define s1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10))
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#define SWAB32(x) ( ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8) | ((x & 0x00FF0000) >> 8) | ((x & 0xFF000000) >> 24) )
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@ -152,32 +156,25 @@ __device__ __forceinline__ void groestlcoin_perm_P(uint32_t *a, char *mixtabs)
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for(int k=0;k<16;k++) a[(k*2)+0] ^= PC32up(k * 0x10, 13); break;
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}
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// RBTT
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// RBTT
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#pragma unroll 16
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for(int k=0;k<32;k+=2)
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{
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t[k + 0] = T0up( B32_0(a[k & 0x1f]) ) ^
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T1up( B32_1(a[(k + 2) & 0x1f]) ) ^
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T2up( B32_2(a[(k + 4) & 0x1f]) ) ^
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T3up( B32_3(a[(k + 6) & 0x1f]) ) ^
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T0dn( B32_0(a[(k + 9) & 0x1f]) ) ^
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T1dn( B32_1(a[(k + 11) & 0x1f]) ) ^
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T2dn( B32_2(a[(k + 13) & 0x1f]) ) ^
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T3dn( B32_3(a[(k + 23) & 0x1f]) );
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for(int k=0;k<32;k+=2)
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{
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uint32_t t0_0 = B32_0(a[(k ) & 0x1f]), t9_0 = B32_0(a[(k + 9) & 0x1f]);
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uint32_t t2_1 = B32_1(a[(k + 2) & 0x1f]), t11_1 = B32_1(a[(k + 11) & 0x1f]);
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uint32_t t4_2 = B32_2(a[(k + 4) & 0x1f]), t13_2 = B32_2(a[(k + 13) & 0x1f]);
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uint32_t t6_3 = B32_3(a[(k + 6) & 0x1f]), t23_3 = B32_3(a[(k + 23) & 0x1f]);
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t[k + 0] = T0up( t0_0 ) ^ T1up( t2_1 ) ^ T2up( t4_2 ) ^ T3up( t6_3 ) ^
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T0dn( t9_0 ) ^ T1dn( t11_1 ) ^ T2dn( t13_2 ) ^ T3dn( t23_3 );
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t[k + 1] = T0dn( B32_0(a[k & 0x1f]) ) ^
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T1dn( B32_1(a[(k + 2) & 0x1f]) ) ^
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T2dn( B32_2(a[(k + 4) & 0x1f]) ) ^
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T3dn( B32_3(a[(k + 6) & 0x1f]) ) ^
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T0up( B32_0(a[(k + 9) & 0x1f]) ) ^
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T1up( B32_1(a[(k + 11) & 0x1f]) ) ^
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T2up( B32_2(a[(k + 13) & 0x1f]) ) ^
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T3up( B32_3(a[(k + 23) & 0x1f]) );
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}
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t[k + 1] = T0dn( t0_0 ) ^ T1dn( t2_1 ) ^ T2dn( t4_2 ) ^ T3dn( t6_3 ) ^
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T0up( t9_0 ) ^ T1up( t11_1 ) ^ T2up( t13_2 ) ^ T3up( t23_3 );
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}
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#pragma unroll 32
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for(int k=0;k<32;k++)
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a[k] = t[k];
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}
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for(int k=0;k<32;k++)
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a[k] = t[k];
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}
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}
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__device__ __forceinline__ void groestlcoin_perm_Q(uint32_t *a, char *mixtabs)
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@ -233,32 +230,25 @@ __device__ __forceinline__ void groestlcoin_perm_Q(uint32_t *a, char *mixtabs)
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for(int k=0;k<16;k++) { a[(k*2)+0] ^= QC32up(k * 0x10, 13); a[(k*2)+1] ^= QC32dn(k * 0x10, 13);} break;
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}
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// RBTT
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// RBTT
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#pragma unroll 16
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for(int k=0;k<32;k+=2)
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{
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t[k + 0] = T0up( B32_0(a[(k + 2) & 0x1f]) ) ^
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T1up( B32_1(a[(k + 6) & 0x1f]) ) ^
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T2up( B32_2(a[(k + 10) & 0x1f]) ) ^
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T3up( B32_3(a[(k + 22) & 0x1f]) ) ^
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T0dn( B32_0(a[(k + 1) & 0x1f]) ) ^
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T1dn( B32_1(a[(k + 5) & 0x1f]) ) ^
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T2dn( B32_2(a[(k + 9) & 0x1f]) ) ^
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T3dn( B32_3(a[(k + 13) & 0x1f]) );
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for(int k=0;k<32;k+=2)
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{
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uint32_t t2_0 = B32_0(a[(k + 2) & 0x1f]), t1_0 = B32_0(a[(k + 1) & 0x1f]);
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uint32_t t6_1 = B32_1(a[(k + 6) & 0x1f]), t5_1 = B32_1(a[(k + 5) & 0x1f]);
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uint32_t t10_2 = B32_2(a[(k + 10) & 0x1f]), t9_2 = B32_2(a[(k + 9) & 0x1f]);
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uint32_t t22_3 = B32_3(a[(k + 22) & 0x1f]), t13_3 = B32_3(a[(k + 13) & 0x1f]);
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t[k + 0] = T0up( t2_0 ) ^ T1up( t6_1 ) ^ T2up( t10_2 ) ^ T3up( t22_3 ) ^
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T0dn( t1_0 ) ^ T1dn( t5_1 ) ^ T2dn( t9_2 ) ^ T3dn( t13_3 );
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t[k + 1] = T0dn( B32_0(a[(k + 2) & 0x1f]) ) ^
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T1dn( B32_1(a[(k + 6) & 0x1f]) ) ^
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T2dn( B32_2(a[(k + 10) & 0x1f]) ) ^
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T3dn( B32_3(a[(k + 22) & 0x1f]) ) ^
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T0up( B32_0(a[(k + 1) & 0x1f]) ) ^
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T1up( B32_1(a[(k + 5) & 0x1f]) ) ^
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T2up( B32_2(a[(k + 9) & 0x1f]) ) ^
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T3up( B32_3(a[(k + 13) & 0x1f]) );
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}
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t[k + 1] = T0dn( t2_0 ) ^ T1dn( t6_1 ) ^ T2dn( t10_2 ) ^ T3dn( t22_3 ) ^
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T0up( t1_0 ) ^ T1up( t5_1 ) ^ T2up( t9_2 ) ^ T3up( t13_3 );
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}
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#pragma unroll 32
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for(int k=0;k<32;k++)
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a[k] = t[k];
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}
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for(int k=0;k<32;k++)
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a[k] = t[k];
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}
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}
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#if USE_SHARED
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__global__ void /* __launch_bounds__(256) */
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@ -271,14 +261,17 @@ __global__ void
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#if USE_SHARED
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extern __shared__ char mixtabs[];
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*((uint32_t*)mixtabs + ( threadIdx.x)) = tex1Dfetch(t0up1, threadIdx.x);
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*((uint32_t*)mixtabs + (256+threadIdx.x)) = tex1Dfetch(t0dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (512+threadIdx.x)) = tex1Dfetch(t1up1, threadIdx.x);
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*((uint32_t*)mixtabs + (768+threadIdx.x)) = tex1Dfetch(t1dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (1024+threadIdx.x)) = tex1Dfetch(t2up1, threadIdx.x);
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*((uint32_t*)mixtabs + (1280+threadIdx.x)) = tex1Dfetch(t2dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (1536+threadIdx.x)) = tex1Dfetch(t3up1, threadIdx.x);
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*((uint32_t*)mixtabs + (1792+threadIdx.x)) = tex1Dfetch(t3dn1, threadIdx.x);
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if (threadIdx.x < 256)
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{
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*((uint32_t*)mixtabs + ( threadIdx.x)) = tex1Dfetch(t0up1, threadIdx.x);
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*((uint32_t*)mixtabs + (256+threadIdx.x)) = tex1Dfetch(t0dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (512+threadIdx.x)) = tex1Dfetch(t1up1, threadIdx.x);
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*((uint32_t*)mixtabs + (768+threadIdx.x)) = tex1Dfetch(t1dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (1024+threadIdx.x)) = tex1Dfetch(t2up1, threadIdx.x);
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*((uint32_t*)mixtabs + (1280+threadIdx.x)) = tex1Dfetch(t2dn1, threadIdx.x);
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*((uint32_t*)mixtabs + (1536+threadIdx.x)) = tex1Dfetch(t3up1, threadIdx.x);
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*((uint32_t*)mixtabs + (1792+threadIdx.x)) = tex1Dfetch(t3dn1, threadIdx.x);
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}
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__syncthreads();
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#endif
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@ -407,8 +400,11 @@ __global__ void
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// Setup-Funktionen
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__host__ void groestlcoin_cpu_init(int thr_id, int threads)
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{
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cudaSetDevice(device_map[thr_id]);
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cudaDeviceSetCacheConfig( cudaFuncCachePreferShared );
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cudaSetDevice(device_map[thr_id]);
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cudaGetDeviceProperties(&props, device_map[thr_id]);
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cudaDeviceSetCacheConfig( cudaFuncCachePreferL1 );
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// Texturen mit obigem Makro initialisieren
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texDef(t0up1, d_T0up, T0up_cpu, sizeof(uint32_t)*256);
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texDef(t0dn1, d_T0dn, T0dn_cpu, sizeof(uint32_t)*256);
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@ -452,11 +448,9 @@ __host__ void groestlcoin_cpu_setBlock(int thr_id, void *data, void *pTargetIn)
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__host__ void groestlcoin_cpu_hash(int thr_id, int threads, uint32_t startNounce, void *outputHashes, uint32_t *nounce)
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{
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#if USE_SHARED
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const int threadsperblock = 256; // Alignment mit mixtab Grösse. NICHT ÄNDERN
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#else
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const int threadsperblock = 512; // so einstellen wie gewünscht ;-)
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#endif
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// Compute 3.x und 5.x Geräte am besten mit 768 Threads ansteuern,
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// alle anderen mit 512 Threads.
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int threadsperblock = (props.major >= 3) ? 768 : 512;
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// berechne wie viele Thread Blocks wir brauchen
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dim3 grid((threads + threadsperblock-1)/threadsperblock);
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