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@ -7,27 +7,29 @@
@@ -7,27 +7,29 @@
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#define threadsperblock 256 |
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#define USE_SHARED 1 |
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//#define __DEV_STORAGE__ __constant__ |
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#define __DEV_STORAGE__ __device__ |
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#include "cuda_helper.h" |
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extern __device__ __device_builtin__ void __threadfence_block(void); |
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__constant__ uint64_t c_PaddedMessage80[16]; // padded message (80 bytes + padding) |
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__constant__ uint32_t pTarget[8]; |
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__DEV_STORAGE__ static uint64_t c_PaddedMessage80[16]; // input end block after midstate |
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__DEV_STORAGE__ static uint32_t pTarget[8]; |
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static uint32_t *h_wnounce[MAX_GPUS] = { 0 }; |
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static uint32_t *d_WNonce[MAX_GPUS] = { 0 }; |
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#define USE_ALL_TABLES 1 |
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__constant__ static uint64_t mixTob0Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob0Tox[256]; |
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#if USE_ALL_TABLES |
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__constant__ static uint64_t mixTob1Tox[256]; |
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__constant__ static uint64_t mixTob2Tox[256]; |
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__constant__ static uint64_t mixTob3Tox[256]; |
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__constant__ static uint64_t mixTob4Tox[256]; |
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__constant__ static uint64_t mixTob5Tox[256]; |
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__constant__ static uint64_t mixTob6Tox[256]; |
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__constant__ static uint64_t mixTob7Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob1Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob2Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob3Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob4Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob5Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob6Tox[256]; |
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__DEV_STORAGE__ static uint64_t mixTob7Tox[256]; |
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#endif |
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/** |
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@ -193,7 +195,7 @@ static const uint64_t old1_T0[256] = {
@@ -193,7 +195,7 @@ static const uint64_t old1_T0[256] = {
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SPH_C64(0x3F6B933FF815F8F8), SPH_C64(0xA4C244A486978686) |
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}; |
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#if USE_ALL_TABLES |
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static const uint64_t old1_T1[256] = { |
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SPH_C64(0xD8C0781828181878), SPH_C64(0x2605AF23652323AF), |
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SPH_C64(0xB87EF9C657C6C6F9), SPH_C64(0xFB136FE825E8E86F), |
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@ -1110,6 +1112,7 @@ static const uint64_t old1_T7[256] = {
@@ -1110,6 +1112,7 @@ static const uint64_t old1_T7[256] = {
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SPH_C64(0x2888755D88287828), SPH_C64(0x5C3186DA315CE45C), |
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SPH_C64(0xF83F6B933FF815F8), SPH_C64(0x86A4C244A4869786) |
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}; |
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#endif /* USE_ALL_TABLES */ |
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static const uint64_t old1_RC[10] = { |
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SPH_C64(0x4F01B887E8C62318), |
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@ -1255,6 +1258,7 @@ static const uint64_t plain_T0[256] = {
@@ -1255,6 +1258,7 @@ static const uint64_t plain_T0[256] = {
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SPH_C64(0x6BED3F93F8C7F8F8), SPH_C64(0xC211A44486228686) |
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}; |
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#if USE_ALL_TABLES |
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static const uint64_t plain_T1[256] = { |
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SPH_C64(0x3078C018601818D8), SPH_C64(0x46AF05238C232326), |
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SPH_C64(0x91F97EC63FC6C6B8), SPH_C64(0xCD6F13E887E8E8FB), |
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@ -2171,11 +2175,13 @@ static const uint64_t plain_T7[256] = {
@@ -2171,11 +2175,13 @@ static const uint64_t plain_T7[256] = {
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SPH_C64(0x287550885D28A028), SPH_C64(0x5C86B831DA5C6D5C), |
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SPH_C64(0xF86BED3F93F8C7F8), SPH_C64(0x86C211A444862286) |
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}; |
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#endif /* USE_ALL_TABLES */ |
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/** |
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* Round constants. |
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*/ |
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__constant__ uint64_t InitVector_RC[10]; |
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__DEV_STORAGE__ uint64_t InitVector_RC[10]; |
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static const uint64_t plain_RC[10] = { |
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SPH_C64(0x4F01B887E8C62318), |
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@ -2312,7 +2318,6 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
@@ -2312,7 +2318,6 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
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uint64_t h8[8]; |
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} hash; |
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uint64_t state[8]; |
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uint64_t n[8]; |
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uint64_t h[8]; |
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@ -2322,13 +2327,16 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
@@ -2322,13 +2327,16 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
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h[i] = 0; // read state |
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} |
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#pragma unroll 10 |
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__threadfence_block(); // ensure shared mem is ready |
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// #pragma unroll 10 |
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for (unsigned r=0; r < 10; r++) { |
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uint64_t tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; |
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ROUND_KSCHED(sharedMemory, h, tmp, InitVector_RC[r]); |
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ROUND_WENC(sharedMemory, n, h, tmp); |
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} |
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uint64_t state[8]; |
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#pragma unroll 8 |
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for (int i=0; i < 8; i++) { |
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state[i] = xor1(n[i],c_PaddedMessage80[i]); |
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@ -2351,7 +2359,7 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
@@ -2351,7 +2359,7 @@ void oldwhirlpool_gpu_hash_80(uint32_t threads, uint32_t startNounce, void *outp
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n[i] = xor1(n[i],h[i]); |
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} |
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#pragma unroll 10 |
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// #pragma unroll 10 |
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for (unsigned r=0; r < 10; r++) { |
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uint64_t tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; |
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ROUND_KSCHED(sharedMemory, h, tmp, InitVector_RC[r]); |
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@ -2410,7 +2418,7 @@ void x15_whirlpool_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint64_t
@@ -2410,7 +2418,7 @@ void x15_whirlpool_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint64_t
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for (i=0; i<8; i++) |
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n[i] = hash[i] = g_hash[hashPosition + i]; |
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#pragma unroll 10 |
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// #pragma unroll 10 |
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for (i=0; i < 10; i++) { |
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uint64_t tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; |
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ROUND_KSCHED(sharedMemory, h, tmp, InitVector_RC[i]); |
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@ -2434,7 +2442,7 @@ void x15_whirlpool_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint64_t
@@ -2434,7 +2442,7 @@ void x15_whirlpool_gpu_hash_64(uint32_t threads, uint32_t startNounce, uint64_t
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n[i] = xor1(n[i], h[i]); |
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} |
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#pragma unroll 10 |
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// #pragma unroll 10 |
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for (i=0; i < 10; i++) { |
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uint64_t tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; |
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ROUND_KSCHED(sharedMemory, h, tmp, InitVector_RC[i]); |
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@ -2499,7 +2507,7 @@ void oldwhirlpool_gpu_finalhash_64(uint32_t threads, uint32_t startNounce, uint6
@@ -2499,7 +2507,7 @@ void oldwhirlpool_gpu_finalhash_64(uint32_t threads, uint32_t startNounce, uint6
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h[i] = 0; |
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} |
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#pragma unroll 10 |
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// #pragma unroll 10 |
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for (unsigned r=0; r < 10; r++) { |
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uint64_t tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7; |
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ROUND_KSCHED(sharedMemory, h, tmp, InitVector_RC[r]); |
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@ -2564,6 +2572,7 @@ extern void x15_whirlpool_cpu_init(int thr_id, uint32_t threads, int mode)
@@ -2564,6 +2572,7 @@ extern void x15_whirlpool_cpu_init(int thr_id, uint32_t threads, int mode)
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case 1: /* old whirlpool */ |
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cudaMemcpyToSymbol(InitVector_RC, old1_RC, sizeof(plain_RC), 0, cudaMemcpyHostToDevice); |
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cudaMemcpyToSymbol(mixTob0Tox, old1_T0, sizeof(plain_T0), 0, cudaMemcpyHostToDevice); |
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#if USE_ALL_TABLES |
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cudaMemcpyToSymbol(mixTob1Tox, old1_T1, (256*8), 0, cudaMemcpyHostToDevice); |
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cudaMemcpyToSymbol(mixTob2Tox, old1_T2, (256*8), 0, cudaMemcpyHostToDevice); |
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cudaMemcpyToSymbol(mixTob3Tox, old1_T3, (256*8), 0, cudaMemcpyHostToDevice); |
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@ -2571,6 +2580,7 @@ extern void x15_whirlpool_cpu_init(int thr_id, uint32_t threads, int mode)
@@ -2571,6 +2580,7 @@ extern void x15_whirlpool_cpu_init(int thr_id, uint32_t threads, int mode)
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cudaMemcpyToSymbol(mixTob5Tox, old1_T5, (256*8), 0, cudaMemcpyHostToDevice); |
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cudaMemcpyToSymbol(mixTob6Tox, old1_T6, (256*8), 0, cudaMemcpyHostToDevice); |
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cudaMemcpyToSymbol(mixTob7Tox, old1_T7, (256*8), 0, cudaMemcpyHostToDevice); |
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#endif |
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break; |
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} |
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@ -2591,11 +2601,9 @@ extern void x15_whirlpool_cpu_hash_64(int thr_id, uint32_t threads, uint32_t sta
@@ -2591,11 +2601,9 @@ extern void x15_whirlpool_cpu_hash_64(int thr_id, uint32_t threads, uint32_t sta
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dim3 grid((threads + threadsperblock-1) / threadsperblock); |
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dim3 block(threadsperblock); |
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size_t shared_size = 0; |
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x15_whirlpool_gpu_hash_64<<<grid, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector); |
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x15_whirlpool_gpu_hash_64 <<<grid, block>>> (threads, startNounce, (uint64_t*)d_hash, d_nonceVector); |
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MyStreamSynchronize(NULL, order, thr_id); |
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//MyStreamSynchronize(NULL, order, thr_id); |
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} |
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__host__ |
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@ -2623,13 +2631,10 @@ extern uint32_t whirlpool512_cpu_finalhash_64(int thr_id, uint32_t threads, uint
@@ -2623,13 +2631,10 @@ extern uint32_t whirlpool512_cpu_finalhash_64(int thr_id, uint32_t threads, uint
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__host__ |
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void whirlpool512_cpu_hash_80(int thr_id, uint32_t threads, uint32_t startNounce, uint32_t *d_outputHash, int order) |
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{ |
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// berechne wie viele Thread Blocks wir brauchen |
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dim3 grid((threads + threadsperblock-1) / threadsperblock); |
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dim3 block(threadsperblock); |
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size_t shared_size = 0; |
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oldwhirlpool_gpu_hash_80<<<grid, block, shared_size>>>(threads, startNounce, d_outputHash); |
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oldwhirlpool_gpu_hash_80 <<<grid, block>>> (threads, startNounce, d_outputHash); |
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MyStreamSynchronize(NULL, order, thr_id); |
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} |
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