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@ -137,6 +137,13 @@ nvml_handle * nvml_create() |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceResetApplicationsClocks"); |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceResetApplicationsClocks"); |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks = (nvmlReturn_t (*)(nvmlDevice_t, uint32_t mem, uint32_t *num, uint32_t *)) |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks = (nvmlReturn_t (*)(nvmlDevice_t, uint32_t mem, uint32_t *num, uint32_t *)) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetSupportedGraphicsClocks"); |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetSupportedGraphicsClocks"); |
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nvmlh->nvmlDeviceGetSupportedMemoryClocks = (nvmlReturn_t (*)(nvmlDevice_t, unsigned int *count, unsigned int *clocksMHz)) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetSupportedMemoryClocks"); |
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/* NVML_ERROR_NOT_SUPPORTED
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nvmlh->nvmlDeviceGetAutoBoostedClocksEnabled = (nvmlReturn_t (*)(nvmlDevice_t, nvmlEnableState_t *isEnabled, nvmlEnableState_t *defaultIsEnabled)) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetAutoBoostedClocksEnabled"); |
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nvmlh->nvmlDeviceSetAutoBoostedClocksEnabled = (nvmlReturn_t (*)(nvmlDevice_t, nvmlEnableState_t enabled)) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceSetAutoBoostedClocksEnabled"); */ |
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nvmlh->nvmlDeviceGetClockInfo = (nvmlReturn_t (*)(nvmlDevice_t, nvmlClockType_t, unsigned int *clock)) |
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nvmlh->nvmlDeviceGetClockInfo = (nvmlReturn_t (*)(nvmlDevice_t, nvmlClockType_t, unsigned int *clock)) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetClockInfo"); |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlDeviceGetClockInfo"); |
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nvmlh->nvmlDeviceGetPciInfo = (nvmlReturn_t (*)(nvmlDevice_t, nvmlPciInfo_t *)) |
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nvmlh->nvmlDeviceGetPciInfo = (nvmlReturn_t (*)(nvmlDevice_t, nvmlPciInfo_t *)) |
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@ -162,6 +169,14 @@ nvml_handle * nvml_create() |
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nvmlh->nvmlShutdown = (nvmlReturn_t (*)()) |
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nvmlh->nvmlShutdown = (nvmlReturn_t (*)()) |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlShutdown"); |
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wrap_dlsym(nvmlh->nvml_dll, "nvmlShutdown"); |
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/*
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nvmlDeviceGetBrand(nvmlDevice_t device, nvmlBrandType_t *type) |
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nvmlDeviceGetMaxPcieLinkWidth(nvmlDevice_t device, unsigned int *maxLinkWidth) |
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nvmlDeviceGetMaxPcieLinkGeneration(nvmlDevice_t device, unsigned int *maxLinkGen) |
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nvmlDeviceGetCurrPcieLinkWidth(nvmlDevice_t device, unsigned int *currLinkWidth) |
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nvmlDeviceGetCurrPcieLinkGeneration(nvmlDevice_t device, unsigned int *currLinkGen) |
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*/ |
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if (nvmlh->nvmlInit == NULL || |
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if (nvmlh->nvmlInit == NULL || |
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nvmlh->nvmlShutdown == NULL || |
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nvmlh->nvmlShutdown == NULL || |
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nvmlh->nvmlErrorString == NULL || |
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nvmlh->nvmlErrorString == NULL || |
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@ -293,11 +308,24 @@ int nvml_set_clocks(nvml_handle *nvmlh, int dev_id) |
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if (device_mem_clocks[dev_id]) mem_clk = device_mem_clocks[dev_id]; |
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if (device_mem_clocks[dev_id]) mem_clk = device_mem_clocks[dev_id]; |
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if (device_gpu_clocks[dev_id]) gpu_clk = device_gpu_clocks[dev_id]; |
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if (device_gpu_clocks[dev_id]) gpu_clk = device_gpu_clocks[dev_id]; |
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uint32_t nclocks, clocks[128] = { 0 }; |
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// these functions works for the 960 and the 970 (346.72+), not for the 750 Ti
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uint32_t nclocks = 0, clocks[128] = { 0 }; |
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nvmlh->nvmlDeviceGetSupportedMemoryClocks(nvmlh->devs[n], &nclocks, NULL); |
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nclocks = min(nclocks, 128); |
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nvmlh->nvmlDeviceGetSupportedMemoryClocks(nvmlh->devs[n], &nclocks, clocks); |
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for (uint8_t u=0; u < nclocks; u++) { |
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// ordered desc, so get first
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if (clocks[u] <= mem_clk) { |
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mem_clk = clocks[u]; |
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break; |
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} |
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} |
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nclocks = 0; |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks(nvmlh->devs[n], mem_clk, &nclocks, NULL); |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks(nvmlh->devs[n], mem_clk, &nclocks, NULL); |
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nclocks = min(nclocks, 128); |
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nclocks = min(nclocks, 128); |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks(nvmlh->devs[n], mem_clk, &nclocks, clocks); |
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nvmlh->nvmlDeviceGetSupportedGraphicsClocks(nvmlh->devs[n], mem_clk, &nclocks, clocks); |
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for (unsigned int u=0; u < nclocks; u++) { |
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for (uint8_t u=0; u < nclocks; u++) { |
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// ordered desc, so get first
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// ordered desc, so get first
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if (clocks[u] <= gpu_clk) { |
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if (clocks[u] <= gpu_clk) { |
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gpu_clk = clocks[u]; |
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gpu_clk = clocks[u]; |
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