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@ -1017,13 +1017,13 @@ int nvapi_pstateinfo(unsigned int devNum) |
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info.pstates[n].baseVoltages[0].voltDelta_uV.valueRange.min/1000, // range if editable
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info.pstates[n].baseVoltages[0].voltDelta_uV.valueRange.min/1000, // range if editable
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info.pstates[n].baseVoltages[0].voltDelta_uV.valueRange.max/1000); |
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info.pstates[n].baseVoltages[0].voltDelta_uV.valueRange.max/1000); |
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if (clocks[1].freqDelta_kHz.value || clocks[0].freqDelta_kHz.value) { |
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if (clocks[1].freqDelta_kHz.value || clocks[0].freqDelta_kHz.value) { |
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applog(LOG_RAW, " OC %4d MHz %6.1f MHz", |
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applog(LOG_RAW, " OC %+4d MHz %+6.1f MHz", |
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clocks[1].freqDelta_kHz.value/1000, (double) clocks[0].freqDelta_kHz.value/1000); |
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clocks[1].freqDelta_kHz.value/1000, (double) clocks[0].freqDelta_kHz.value/1000); |
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} |
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} |
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} |
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} |
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// boost over volting (GTX 9xx only ?)
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// boost over volting (GTX 9xx only ?)
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for (n=0; n < info.ov.numVoltages; n++) { |
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for (n=0; n < info.ov.numVoltages; n++) { |
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applog(LOG_RAW, " OV: %u+%u mV%s \x7F %d/%d", |
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applog(LOG_RAW, " OV: %u%+u mV%s \x7F %d/%d", |
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info.ov.voltages[n].volt_uV/1000, info.ov.voltages[n].voltDelta_uV.value/1000, info.ov.voltages[n].bIsEditable ? "*":" ", |
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info.ov.voltages[n].volt_uV/1000, info.ov.voltages[n].voltDelta_uV.value/1000, info.ov.voltages[n].bIsEditable ? "*":" ", |
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info.ov.voltages[n].voltDelta_uV.valueRange.min/1000, info.ov.voltages[n].voltDelta_uV.valueRange.max/1000); |
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info.ov.voltages[n].voltDelta_uV.valueRange.min/1000, info.ov.voltages[n].voltDelta_uV.valueRange.max/1000); |
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} |
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} |
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@ -1048,19 +1048,25 @@ int nvapi_pstateinfo(unsigned int devNum) |
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(double) freqs.domain[NVAPI_GPU_PUBLIC_CLOCK_MEMORY].frequency / 1000, |
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(double) freqs.domain[NVAPI_GPU_PUBLIC_CLOCK_MEMORY].frequency / 1000, |
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(double) freqs.domain[NVAPI_GPU_PUBLIC_CLOCK_GRAPHICS].frequency / 1000); |
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(double) freqs.domain[NVAPI_GPU_PUBLIC_CLOCK_GRAPHICS].frequency / 1000); |
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// Maxwell only
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NVAPI_VOLT_STATUS mvdom = { 0 }; |
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mvdom.version = NVAPI_VOLT_STATUS_VER; |
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if ((ret = NvAPI_DLL_GetVoltageDomainsStatus(phys[devNum], &mvdom)) == NVAPI_OK) { |
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if (mvdom.value_uV) |
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applog(LOG_RAW, " GPU Voltage is %u mV", mvdom.value_uV/1000); |
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} |
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// Pascal only
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// Pascal only
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NVAPI_VOLTAGE_STATUS pvdom = { 0 }; |
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NVAPI_VOLTBOOST_PERCENT pvb = { 0 }; |
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pvdom.version = NVAPI_VOLTAGE_STATUS_VER; |
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pvb.version = NVAPI_VOLTBOOST_PERCENT_VER; |
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if ((ret = NvAPI_DLL_GetCurrentVoltage(phys[devNum], &pvdom)) == NVAPI_OK) { |
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if ((ret = NvAPI_DLL_GetCoreVoltageBoostPercent(phys[devNum], &pvb)) == NVAPI_OK) { |
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NVAPI_VOLTAGE_STATUS pvdom = { 0 }; |
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pvdom.version = NVAPI_VOLTAGE_STATUS_VER; |
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NvAPI_DLL_GetCurrentVoltage(phys[devNum], &pvdom); |
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if (pvdom.value_uV) |
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if (pvdom.value_uV) |
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applog(LOG_RAW, " GPU Voltage is %u mV %+d%% boost", pvdom.value_uV/1000, pvb.percent); |
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else |
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applog(LOG_RAW, " GPU Voltage is %u mV", pvdom.value_uV/1000); |
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applog(LOG_RAW, " GPU Voltage is %u mV", pvdom.value_uV/1000); |
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} else { |
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// Maxwell 9xx
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NVAPI_VOLT_STATUS mvdom = { 0 }; |
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mvdom.version = NVAPI_VOLT_STATUS_VER; |
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if ((ret = NvAPI_DLL_GetVoltageDomainsStatus(phys[devNum], &mvdom)) == NVAPI_OK) { |
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if (mvdom.value_uV) |
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applog(LOG_RAW, " GPU Voltage is %u mV", mvdom.value_uV/1000); |
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} |
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} |
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} |
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uint8_t plim = nvapi_get_plimit(devNum); |
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uint8_t plim = nvapi_get_plimit(devNum); |
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@ -1334,7 +1340,7 @@ int nvapi_set_memclock(unsigned int devNum, uint32_t clock) |
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// seems ok on maxwell and pascal for the mem clocks
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// seems ok on maxwell and pascal for the mem clocks
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NV_GPU_PERF_PSTATES_INFO deffreqs = { 0 }; |
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NV_GPU_PERF_PSTATES_INFO deffreqs = { 0 }; |
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deffreqs.version = NV_GPU_PERF_PSTATES_INFO_VER; |
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deffreqs.version = NV_GPU_PERF_PSTATES_INFO_VER; |
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ret = NvAPI_GPU_GetPstatesInfoEx(phys[devNum], &deffreqs, 0x1); // wrong def clocks, useless
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ret = NvAPI_GPU_GetPstatesInfoEx(phys[devNum], &deffreqs, 0x1); // deprecated but req for def clocks
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if (ret == NVAPI_OK) { |
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if (ret == NVAPI_OK) { |
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if (deffreqs.pstates[0].clocks[0].domainId == NVAPI_GPU_PUBLIC_CLOCK_MEMORY) |
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if (deffreqs.pstates[0].clocks[0].domainId == NVAPI_GPU_PUBLIC_CLOCK_MEMORY) |
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delta = (clock * 1000) - deffreqs.pstates[0].clocks[0].freq; |
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delta = (clock * 1000) - deffreqs.pstates[0].clocks[0].freq; |
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@ -1358,6 +1364,20 @@ int nvapi_set_memclock(unsigned int devNum, uint32_t clock) |
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return ret; |
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return ret; |
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} |
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} |
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// Replacement for WIN32 CUDA 6.5 on pascal
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int nvapiMemGetInfo(int dev_id, size_t *free, size_t *total) |
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{ |
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NvAPI_Status ret = NVAPI_OK; |
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NV_DISPLAY_DRIVER_MEMORY_INFO mem = { 0 }; |
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mem.version = NV_DISPLAY_DRIVER_MEMORY_INFO_VER; |
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unsigned int devNum = nvapi_dev_map[dev_id % MAX_GPUS]; |
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if ((ret = NvAPI_GPU_GetMemoryInfo(phys[devNum], &mem)) == NVAPI_OK) { |
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*total = mem.availableDedicatedVideoMemory; |
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*free = mem.curAvailableDedicatedVideoMemory; |
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} |
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return (int) ret; |
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} |
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int nvapi_init() |
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int nvapi_init() |
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{ |
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{ |
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int num_gpus = cuda_num_devices(); |
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int num_gpus = cuda_num_devices(); |
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