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#include <stdio.h>
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#include <stdint.h>
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#include <memory.h>
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#include "cuda_helper.h"
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// aus cpu-miner.c
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extern int device_map[8];
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// Take a look at: https://www.schneier.com/skein1.3.pdf
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#define SHL(x, n) ((x) << (n))
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#define SHR(x, n) ((x) >> (n))
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#if __CUDA_ARCH__ >= 320
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__device__
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uint64_t skein_rotl64(const uint64_t x, const int offset)
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{
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uint64_t res;
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asm("{\n\t"
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".reg .u32 tl,th,vl,vh;\n\t"
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".reg .pred p;\n\t"
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"mov.b64 {tl,th}, %1;\n\t"
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"shf.l.wrap.b32 vl, tl, th, %2;\n\t"
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"shf.l.wrap.b32 vh, th, tl, %2;\n\t"
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"setp.lt.u32 p, %2, 32;\n\t"
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"@!p mov.b64 %0, {vl,vh};\n\t"
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"@p mov.b64 %0, {vh,vl};\n\t"
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"}"
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: "=l"(res) : "l"(x) , "r"(offset)
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);
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return res;
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}
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#undef ROTL64
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#define ROTL64 skein_rotl64
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#endif
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/*
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* M9_ ## s ## _ ## i evaluates to s+i mod 9 (0 <= s <= 18, 0 <= i <= 7).
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*/
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#define M9_0_0 0
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#define M9_0_1 1
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#define M9_0_2 2
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#define M9_0_3 3
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#define M9_0_4 4
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#define M9_0_5 5
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#define M9_0_6 6
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#define M9_0_7 7
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#define M9_1_0 1
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#define M9_1_1 2
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#define M9_1_2 3
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#define M9_1_3 4
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#define M9_1_4 5
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#define M9_1_5 6
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#define M9_1_6 7
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#define M9_1_7 8
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#define M9_2_0 2
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#define M9_2_1 3
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#define M9_2_2 4
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#define M9_2_3 5
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#define M9_2_4 6
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#define M9_2_5 7
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#define M9_2_6 8
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#define M9_2_7 0
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#define M9_3_0 3
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#define M9_3_1 4
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#define M9_3_2 5
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#define M9_3_3 6
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#define M9_3_4 7
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#define M9_3_5 8
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#define M9_3_6 0
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#define M9_3_7 1
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#define M9_4_0 4
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#define M9_4_1 5
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#define M9_4_2 6
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#define M9_4_3 7
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#define M9_4_4 8
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#define M9_4_5 0
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#define M9_4_6 1
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#define M9_4_7 2
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#define M9_5_0 5
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#define M9_5_1 6
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#define M9_5_2 7
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#define M9_5_3 8
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#define M9_5_4 0
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#define M9_5_5 1
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#define M9_5_6 2
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#define M9_5_7 3
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#define M9_6_0 6
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#define M9_6_1 7
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#define M9_6_2 8
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#define M9_6_3 0
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#define M9_6_4 1
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#define M9_6_5 2
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#define M9_6_6 3
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#define M9_6_7 4
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#define M9_7_0 7
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#define M9_7_1 8
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#define M9_7_2 0
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#define M9_7_3 1
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#define M9_7_4 2
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#define M9_7_5 3
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#define M9_7_6 4
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#define M9_7_7 5
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#define M9_8_0 8
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#define M9_8_1 0
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#define M9_8_2 1
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#define M9_8_3 2
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#define M9_8_4 3
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#define M9_8_5 4
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#define M9_8_6 5
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#define M9_8_7 6
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#define M9_9_0 0
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#define M9_9_1 1
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#define M9_9_2 2
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#define M9_9_3 3
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#define M9_9_4 4
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#define M9_9_5 5
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#define M9_9_6 6
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#define M9_9_7 7
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#define M9_10_0 1
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#define M9_10_1 2
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#define M9_10_2 3
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#define M9_10_3 4
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#define M9_10_4 5
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#define M9_10_5 6
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#define M9_10_6 7
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#define M9_10_7 8
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#define M9_11_0 2
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#define M9_11_1 3
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#define M9_11_2 4
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#define M9_11_3 5
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#define M9_11_4 6
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#define M9_11_5 7
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#define M9_11_6 8
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#define M9_11_7 0
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#define M9_12_0 3
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#define M9_12_1 4
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#define M9_12_2 5
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#define M9_12_3 6
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#define M9_12_4 7
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#define M9_12_5 8
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#define M9_12_6 0
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#define M9_12_7 1
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#define M9_13_0 4
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#define M9_13_1 5
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#define M9_13_2 6
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#define M9_13_3 7
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#define M9_13_4 8
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#define M9_13_5 0
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#define M9_13_6 1
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#define M9_13_7 2
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#define M9_14_0 5
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#define M9_14_1 6
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#define M9_14_2 7
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#define M9_14_3 8
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#define M9_14_4 0
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#define M9_14_5 1
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#define M9_14_6 2
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#define M9_14_7 3
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#define M9_15_0 6
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#define M9_15_1 7
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#define M9_15_2 8
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#define M9_15_3 0
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#define M9_15_4 1
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#define M9_15_5 2
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#define M9_15_6 3
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#define M9_15_7 4
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#define M9_16_0 7
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#define M9_16_1 8
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#define M9_16_2 0
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#define M9_16_3 1
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#define M9_16_4 2
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#define M9_16_5 3
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#define M9_16_6 4
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#define M9_16_7 5
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#define M9_17_0 8
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#define M9_17_1 0
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#define M9_17_2 1
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#define M9_17_3 2
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#define M9_17_4 3
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#define M9_17_5 4
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#define M9_17_6 5
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#define M9_17_7 6
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#define M9_18_0 0
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#define M9_18_1 1
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#define M9_18_2 2
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#define M9_18_3 3
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#define M9_18_4 4
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#define M9_18_5 5
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#define M9_18_6 6
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#define M9_18_7 7
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/*
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* M3_ ## s ## _ ## i evaluates to s+i mod 3 (0 <= s <= 18, 0 <= i <= 1).
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*/
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#define M3_0_0 0
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#define M3_0_1 1
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#define M3_1_0 1
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#define M3_1_1 2
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#define M3_2_0 2
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#define M3_2_1 0
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#define M3_3_0 0
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#define M3_3_1 1
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#define M3_4_0 1
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#define M3_4_1 2
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#define M3_5_0 2
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#define M3_5_1 0
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#define M3_6_0 0
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#define M3_6_1 1
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#define M3_7_0 1
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#define M3_7_1 2
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#define M3_8_0 2
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#define M3_8_1 0
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#define M3_9_0 0
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#define M3_9_1 1
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#define M3_10_0 1
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#define M3_10_1 2
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#define M3_11_0 2
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#define M3_11_1 0
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#define M3_12_0 0
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#define M3_12_1 1
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#define M3_13_0 1
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#define M3_13_1 2
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#define M3_14_0 2
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#define M3_14_1 0
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#define M3_15_0 0
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#define M3_15_1 1
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#define M3_16_0 1
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#define M3_16_1 2
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#define M3_17_0 2
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#define M3_17_1 0
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#define M3_18_0 0
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#define M3_18_1 1
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#define XCAT(x, y) XCAT_(x, y)
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#define XCAT_(x, y) x ## y
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#define SKBI(k, s, i) XCAT(k, XCAT(XCAT(XCAT(M9_, s), _), i))
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#define SKBT(t, s, v) XCAT(t, XCAT(XCAT(XCAT(M3_, s), _), v))
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#define TFBIG_KINIT(k0, k1, k2, k3, k4, k5, k6, k7, k8, t0, t1, t2) { \
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k8 = ((k0 ^ k1) ^ (k2 ^ k3)) ^ ((k4 ^ k5) ^ (k6 ^ k7)) \
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^ SPH_C64(0x1BD11BDAA9FC1A22); \
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t2 = t0 ^ t1; \
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}
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#define TFBIG_ADDKEY(w0, w1, w2, w3, w4, w5, w6, w7, k, t, s) { \
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w0 = (w0 + SKBI(k, s, 0)); \
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w1 = (w1 + SKBI(k, s, 1)); \
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w2 = (w2 + SKBI(k, s, 2)); \
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w3 = (w3 + SKBI(k, s, 3)); \
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w4 = (w4 + SKBI(k, s, 4)); \
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w5 = (w5 + SKBI(k, s, 5) + SKBT(t, s, 0)); \
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w6 = (w6 + SKBI(k, s, 6) + SKBT(t, s, 1)); \
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w7 = (w7 + SKBI(k, s, 7) + (uint64_t)s); \
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}
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#define TFBIG_MIX(x0, x1, rc) { \
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x0 = x0 + x1; \
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x1 = ROTL64(x1, rc) ^ x0; \
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}
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#define TFBIG_MIX8(w0, w1, w2, w3, w4, w5, w6, w7, rc0, rc1, rc2, rc3) { \
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TFBIG_MIX(w0, w1, rc0); \
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TFBIG_MIX(w2, w3, rc1); \
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TFBIG_MIX(w4, w5, rc2); \
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TFBIG_MIX(w6, w7, rc3); \
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}
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#define TFBIG_4e(s) { \
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TFBIG_ADDKEY(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], h, t, s); \
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TFBIG_MIX8(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], 46, 36, 19, 37); \
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TFBIG_MIX8(p[2], p[1], p[4], p[7], p[6], p[5], p[0], p[3], 33, 27, 14, 42); \
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TFBIG_MIX8(p[4], p[1], p[6], p[3], p[0], p[5], p[2], p[7], 17, 49, 36, 39); \
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TFBIG_MIX8(p[6], p[1], p[0], p[7], p[2], p[5], p[4], p[3], 44, 9, 54, 56); \
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}
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#define TFBIG_4o(s) { \
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TFBIG_ADDKEY(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], h, t, s); \
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TFBIG_MIX8(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], 39, 30, 34, 24); \
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TFBIG_MIX8(p[2], p[1], p[4], p[7], p[6], p[5], p[0], p[3], 13, 50, 10, 17); \
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TFBIG_MIX8(p[4], p[1], p[6], p[3], p[0], p[5], p[2], p[7], 25, 29, 39, 43); \
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TFBIG_MIX8(p[6], p[1], p[0], p[7], p[2], p[5], p[4], p[3], 8, 35, 56, 22); \
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}
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__global__
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void quark_skein512_gpu_hash_64(int threads, uint32_t startNounce, uint64_t * const __restrict__ g_hash, uint32_t *g_nonceVector)
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{
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int thread = (blockDim.x * blockIdx.x + threadIdx.x);
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if (thread < threads)
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{
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// Skein
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uint64_t p[8];
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uint64_t h0, h1, h2, h3, h4, h5, h6, h7, h8;
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uint64_t t0, t1, t2;
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uint32_t nounce = (g_nonceVector != NULL) ? g_nonceVector[thread] : (startNounce + thread);
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int hashPosition = nounce - startNounce;
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uint64_t *inpHash = &g_hash[8 * hashPosition];
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// Initialisierung
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h0 = 0x4903ADFF749C51CEull;
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h1 = 0x0D95DE399746DF03ull;
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h2 = 0x8FD1934127C79BCEull;
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h3 = 0x9A255629FF352CB1ull;
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h4 = 0x5DB62599DF6CA7B0ull;
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h5 = 0xEABE394CA9D5C3F4ull;
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h6 = 0x991112C71A75B523ull;
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h7 = 0xAE18A40B660FCC33ull;
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// 1. Runde -> etype = 480, ptr = 64, bcount = 0, data = msg
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#pragma unroll 8
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for(int i=0;i<8;i++)
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p[i] = inpHash[i];
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t0 = 64; // ptr
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t1 = 480ull << 55; // etype
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TFBIG_KINIT(h0, h1, h2, h3, h4, h5, h6, h7, h8, t0, t1, t2);
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TFBIG_4e(0);
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TFBIG_4o(1);
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TFBIG_4e(2);
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TFBIG_4o(3);
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TFBIG_4e(4);
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TFBIG_4o(5);
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TFBIG_4e(6);
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TFBIG_4o(7);
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TFBIG_4e(8);
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TFBIG_4o(9);
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TFBIG_4e(10);
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TFBIG_4o(11);
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TFBIG_4e(12);
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TFBIG_4o(13);
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TFBIG_4e(14);
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TFBIG_4o(15);
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TFBIG_4e(16);
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TFBIG_4o(17);
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TFBIG_ADDKEY(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], h, t, 18);
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h0 = inpHash[0] ^ p[0];
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h1 = inpHash[1] ^ p[1];
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h2 = inpHash[2] ^ p[2];
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h3 = inpHash[3] ^ p[3];
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h4 = inpHash[4] ^ p[4];
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h5 = inpHash[5] ^ p[5];
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h6 = inpHash[6] ^ p[6];
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h7 = inpHash[7] ^ p[7];
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// 2. Runde -> etype = 510, ptr = 8, bcount = 0, data = 0
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#pragma unroll 8
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for(int i=0;i<8;i++)
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p[i] = 0;
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t0 = 8; // ptr
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t1 = 510ull << 55; // etype
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TFBIG_KINIT(h0, h1, h2, h3, h4, h5, h6, h7, h8, t0, t1, t2);
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TFBIG_4e(0);
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TFBIG_4o(1);
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TFBIG_4e(2);
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TFBIG_4o(3);
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TFBIG_4e(4);
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TFBIG_4o(5);
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TFBIG_4e(6);
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TFBIG_4o(7);
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TFBIG_4e(8);
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TFBIG_4o(9);
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TFBIG_4e(10);
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TFBIG_4o(11);
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TFBIG_4e(12);
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TFBIG_4o(13);
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TFBIG_4e(14);
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TFBIG_4o(15);
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TFBIG_4e(16);
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TFBIG_4o(17);
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TFBIG_ADDKEY(p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], h, t, 18);
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// fertig
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uint64_t *outpHash = &g_hash[8 * hashPosition];
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#pragma unroll 8
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for(int i=0;i<8;i++)
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outpHash[i] = p[i];
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}
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}
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// Setup-Funktionen
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__host__
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void quark_skein512_cpu_init(int thr_id, int threads)
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{
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}
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__host__
|
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void quark_skein512_cpu_hash_64(int thr_id, int threads, uint32_t startNounce, uint32_t *d_nonceVector, uint32_t *d_hash, int order)
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{
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const int threadsperblock = 256;
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// berechne wie viele Thread Blocks wir brauchen
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dim3 grid((threads + threadsperblock-1)/threadsperblock);
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dim3 block(threadsperblock);
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// Gr<EFBFBD><EFBFBD>e des dynamischen Shared Memory Bereichs
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size_t shared_size = 0;
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quark_skein512_gpu_hash_64<<<grid, block, shared_size>>>(threads, startNounce, (uint64_t*)d_hash, d_nonceVector);
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// Strategisches Sleep Kommando zur Senkung der CPU Last
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|
MyStreamSynchronize(NULL, order, thr_id);
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}
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