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/**
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* Lbry CUDA Implementation
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*
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* by tpruvot@github - July 2016
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*
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*/
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#include <string.h>
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#include <stdint.h>
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extern "C" {
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#include <sph/sph_sha2.h>
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#include <sph/sph_ripemd.h>
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}
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#include <cuda_helper.h>
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#include <miner.h>
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#define A 64
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#define debug_cpu 0
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extern "C" void lbry_hash(void* output, const void* input)
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{
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uint32_t _ALIGN(A) hashA[16];
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uint32_t _ALIGN(A) hashB[8];
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uint32_t _ALIGN(A) hashC[8];
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sph_sha256_context ctx_sha256;
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sph_sha512_context ctx_sha512;
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sph_ripemd160_context ctx_ripemd;
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sph_sha256_init(&ctx_sha256);
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sph_sha256(&ctx_sha256, input, 112);
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sph_sha256_close(&ctx_sha256, hashA);
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sph_sha256(&ctx_sha256, hashA, 32);
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sph_sha256_close(&ctx_sha256, hashA);
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sph_sha512_init(&ctx_sha512);
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sph_sha512(&ctx_sha512, hashA, 32);
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sph_sha512_close(&ctx_sha512, hashA);
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sph_ripemd160_init(&ctx_ripemd);
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sph_ripemd160(&ctx_ripemd, hashA, 32); // sha512 low
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sph_ripemd160_close(&ctx_ripemd, hashB);
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if (debug_cpu) applog_hex(hashB, 20);
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sph_ripemd160(&ctx_ripemd, &hashA[8], 32); // sha512 high
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sph_ripemd160_close(&ctx_ripemd, hashC);
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if (debug_cpu) applog_hex(hashC, 20);
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sph_sha256(&ctx_sha256, hashB, 20);
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sph_sha256(&ctx_sha256, hashC, 20);
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sph_sha256_close(&ctx_sha256, hashA);
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if (debug_cpu) applog_hex(hashA,32);
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sph_sha256(&ctx_sha256, hashA, 32);
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sph_sha256_close(&ctx_sha256, hashA);
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memcpy(output, hashA, 32);
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}
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/* ############################################################################################################################### */
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extern void lbry_sha256_init(int thr_id);
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extern void lbry_sha256_free(int thr_id);
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extern void lbry_sha256_setBlock_112(uint32_t *pdata, uint32_t *ptarget);
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extern void lbry_sha256d_hash_112(int thr_id, uint32_t threads, uint32_t startNonce, uint32_t *d_outputHash);
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extern void lbry_sha512_init(int thr_id);
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extern void lbry_sha512_hash_32(int thr_id, uint32_t threads, uint32_t *d_hash);
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extern void lbry_sha256d_hash_final(int thr_id, uint32_t threads, uint32_t startNonce, uint32_t *d_inputHash, uint32_t *resNonces);
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static __inline uint32_t swab32_if(uint32_t val, bool iftrue) {
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return iftrue ? swab32(val) : val;
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}
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static bool init[MAX_GPUS] = { 0 };
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static uint32_t *d_hash[MAX_GPUS];
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// nonce position is different
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#define LBC_NONCE_OFT32 27
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extern "C" int scanhash_lbry(int thr_id, struct work *work, uint32_t max_nonce, unsigned long *hashes_done)
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{
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uint32_t _ALIGN(A) vhash[8];
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uint32_t _ALIGN(A) endiandata[28];
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uint32_t *pdata = work->data;
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uint32_t *ptarget = work->target;
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const uint32_t first_nonce = pdata[LBC_NONCE_OFT32];
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const int swap = 0; // to toggle nonce endian (need kernel change)
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const int dev_id = device_map[thr_id];
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int intensity = (device_sm[dev_id] > 500 && !is_windows()) ? 22 : 20;
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if (device_sm[dev_id] >= 600) intensity = 23;
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if (device_sm[dev_id] < 350) intensity = 18;
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uint32_t throughput = cuda_default_throughput(thr_id, 1U << intensity);
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//if (init[thr_id]) throughput = min(throughput, max_nonce - first_nonce);
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if (opt_benchmark) {
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ptarget[7] = 0xf;
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}
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if (!init[thr_id]){
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cudaSetDevice(dev_id);
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if (opt_cudaschedule == -1 && gpu_threads == 1) {
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cudaDeviceReset();
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// reduce cpu usage (linux)
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cudaSetDeviceFlags(cudaDeviceScheduleBlockingSync);
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CUDA_LOG_ERROR();
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}
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CUDA_SAFE_CALL(cudaMalloc(&d_hash[thr_id], (size_t) 64 * throughput));
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lbry_sha256_init(thr_id);
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lbry_sha512_init(thr_id);
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CUDA_LOG_ERROR();
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init[thr_id] = true;
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}
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for (int i=0; i < LBC_NONCE_OFT32; i++) {
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be32enc(&endiandata[i], pdata[i]);
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}
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lbry_sha256_setBlock_112(endiandata, ptarget);
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do {
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// Hash with CUDA
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lbry_sha256d_hash_112(thr_id, throughput, pdata[LBC_NONCE_OFT32], d_hash[thr_id]);
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CUDA_LOG_ERROR();
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lbry_sha512_hash_32(thr_id, throughput, d_hash[thr_id]);
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CUDA_LOG_ERROR();
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uint32_t resNonces[2] = { UINT32_MAX, UINT32_MAX };
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lbry_sha256d_hash_final(thr_id, throughput, pdata[LBC_NONCE_OFT32], d_hash[thr_id], resNonces);
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CUDA_LOG_ERROR();
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uint32_t foundNonce = resNonces[0];
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*hashes_done = pdata[LBC_NONCE_OFT32] - first_nonce + throughput;
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if (foundNonce != UINT32_MAX)
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{
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endiandata[LBC_NONCE_OFT32] = swab32_if(foundNonce, !swap);
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lbry_hash(vhash, endiandata);
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if (vhash[7] <= ptarget[7] && fulltest(vhash, ptarget)) {
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int res = 1;
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uint32_t secNonce = resNonces[1];
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work->nonces[0] = swab32_if(foundNonce, swap);
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work_set_target_ratio(work, vhash);
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if (secNonce != UINT32_MAX) {
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if (opt_debug)
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gpulog(LOG_BLUE, thr_id, "found second nonce %08x", swab32(secNonce));
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endiandata[LBC_NONCE_OFT32] = swab32_if(secNonce, !swap);
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lbry_hash(vhash, endiandata);
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work->nonces[1] = swab32_if(secNonce, swap);
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if (bn_hash_target_ratio(vhash, ptarget) > work->shareratio) {
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work_set_target_ratio(work, vhash);
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xchg(work->nonces[0], work->nonces[1]);
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}
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res++;
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}
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pdata[LBC_NONCE_OFT32] = work->nonces[0];
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return res;
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} else {
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gpulog(LOG_WARNING, thr_id, "result for %08x does not validate on CPU %08x > %08x!", foundNonce, vhash[7], ptarget[7]);
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}
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}
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if ((uint64_t) throughput + pdata[LBC_NONCE_OFT32] >= max_nonce) {
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pdata[LBC_NONCE_OFT32] = max_nonce;
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break;
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}
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pdata[LBC_NONCE_OFT32] += throughput;
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} while (!work_restart[thr_id].restart);
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*hashes_done = pdata[LBC_NONCE_OFT32] - first_nonce;
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return 0;
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}
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// cleanup
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void free_lbry(int thr_id)
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{
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if (!init[thr_id])
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return;
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cudaThreadSynchronize();
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cudaFree(d_hash[thr_id]);
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lbry_sha256_free(thr_id);
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init[thr_id] = false;
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cudaDeviceSynchronize();
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}
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